A low-power 14-bit 150MS/s analog-to-digital converter(ADC) is presented for communication applications.Range scaling enables a maximal 2-Vp-p input with a single-stage opamp adopted.Opamp and capacitor sharing betwee...A low-power 14-bit 150MS/s analog-to-digital converter(ADC) is presented for communication applications.Range scaling enables a maximal 2-Vp-p input with a single-stage opamp adopted.Opamp and capacitor sharing between the first multiplying digital-to-analog converter(MDAC)and the second one reduces the total opamp power further.The dedicated sample-andhold amplifier(SHA) is removed to lower the power and the noise.The blind calibration of linearity errors is proposed to improve the performance.The prototype ADC is fabricated in a 130 nm CMOS process with a 1.3-V supply voltage.The SNDR of the ADC is 71.3 dB with a 2.4 MHz input and remains 68.5 dB for a 120 MHz input.It consumes 85 mW,which includes 57 mW for the ADC core,11 mW for the low jitter clock receiver and 17 mW for the high-speed reference buffer.展开更多
基金supported by the Major National Science & Technology Program of China under Grant No.2012ZX03004004-002National High Technology Research and Development Program of China under Grant No. 2013AA014302
文摘A low-power 14-bit 150MS/s analog-to-digital converter(ADC) is presented for communication applications.Range scaling enables a maximal 2-Vp-p input with a single-stage opamp adopted.Opamp and capacitor sharing between the first multiplying digital-to-analog converter(MDAC)and the second one reduces the total opamp power further.The dedicated sample-andhold amplifier(SHA) is removed to lower the power and the noise.The blind calibration of linearity errors is proposed to improve the performance.The prototype ADC is fabricated in a 130 nm CMOS process with a 1.3-V supply voltage.The SNDR of the ADC is 71.3 dB with a 2.4 MHz input and remains 68.5 dB for a 120 MHz input.It consumes 85 mW,which includes 57 mW for the ADC core,11 mW for the low jitter clock receiver and 17 mW for the high-speed reference buffer.
