Efficient structures for wideband digital receiver

Digital receivers have become more and more popular in radar, communication, and electric warfare for the advantages compared with their analog counterparts. But conventional digital receivers have been generally considered impractical for bandwidth greater than several hundreds MHz. To extend receiver bandwidth, decrease data rate and save hardware resources, three novel structures are proposed. They decimate the data stream prior to mixing and filtering, then process the multiple decimated streams in parallel at a lower rate. Consequently it is feasible to realize wideband receivers on the current ASIC devices. A design example and corresponding simulation results are demonstrated to evaluate the proposed structures.

Digital Receiver for Laser Imaging Radar

With the extension of the application domains for laser imaging radar, it is necessary to find a new technical way to obtain high technical performance and adaptive ability. In this paper, A new concept of digital receiver of laser imaging radar system is presented. This digital receiver is defined as a time varying parameter receiver which possesses large dynamics region and time domain filter. The receiver’s mode, component structure as well as every function of its processing are described. The results and laboratorial data show the feasibility of digital reception. Also, it can exploit the inherent nature of laser imaging radar to obtain high probability of detection.

High Sensitivity Digital Instantaneous Frequency Measurement Receiver for Precise Frequency Analysis

There are numerous applications, such as Radar, that leverage wideband technology. However, the presence of noise introduces certain limitations and challenges. It is crucial to harness wideband technology for applications demanding the rapid and precise transmission of diverse information from one point to another within a short timeframe. The ability to report a signal without tuning within the input bandwidth stands out as one of the advantages of employing a digital wideband receiver. As indicated, a digital wideband receiver plays a pivotal role in achieving high precision and accuracy. The primary distinction between Analog and Digital Instantaneous Frequency Measurement lies in the fact that analog Instantaneous Frequency Measurement (IFM) receivers have traditionally covered extensive input bandwidths, reporting one accurate frequency per short pulse. In the contemporary landscape, digital IFM systems utilize high-sampling-rate Analog-to-Digital Converters (ADC) along with Hilbert transforms to generate two output channels featuring a 90-degree phase shift. This paper explores the improvement of sensitivity in current digital IFM receivers. The optimization efforts target the Hilbert transform and autocorrelations architectures, aiming to refine the system’s ability to report fine frequencies within a noisy wide bandwidth environment, thereby elevating its overall sensitivity.

Design and simulation of digital channelized receivers in fractional Fourier domain

An approach is proposed to realize a digital channelized receiver in the fractional Fourier domain （FRFD） for signal intercept applications. The presented architecture can be considered as a generalization of that in the traditional Fourier domain. Since the linear frequency modulation （LFM） signal has a good energy concentration in the FRFD, by choosing an appropriate fractional Fourier transform （FRFT） order, the presented architecture can concentrate the broadband LFM signal into only one sub-channel and that will prevent it from crossing several sub-channels. Thus the performance of the signal detection and parameter estimation after the sub-channel output will be improved significantly. The computational complexity is reduced enormously due to the implementation of the polyphase filter bank decomposition, thus the proposed architecture can be realized as efficiently as in the Fourier domain. The related simulation results are presented to verify the validity of the theories and methods involved in this paper.

Design and Implementation of Partial Shared Digital Channelized Receiver

A novel efficient partial sharing channelization structure with odd and even stacking is designed and implemented. There are two special designs in the proposed structure. Firstly, by the intensive channel overlap design, for non-cooperative wideband signals, the proposed structure can achieve good parameter estimation accuracy and high probability of complete interception.Secondly, based on the partial sharing design developed in this paper, the computation burden of the proposed structure can be greatly reduced compared with the traditional directly implemented structures. Experiments and numerical simulations are conducted to evaluate the proposed structure, which shows its improvements over traditional methods in terms of field programmable gate arrays(FPGA) resource consumption and parameter estimation accuracy.

Design and Implementation of a Cueing Wideband Digital EW Receiver

A cueing wideband digital Electronic Warfare （EW） receiver is presented. The proposed receiver, which is to measure the instantaneous frequency and bandwidth of the intercept short-duration pulse radar signals that cue and match the corresponding ones, meets the requirements of good sensitivity and dynamic range for EW and can save hardware resources greatly as well. In addition, real-time signal processing, which is the main bottleneck for covering a wide instantaneous frequency band for EW receiver, is better solved in the proposed design structure. The highly efficient implementation and good parameter estimation algorithms are proposed as welL Theoretical analysis and experimental results show that this structure is feasible.

Research for the Dynamic Range and Its Extension of Digital Intermediate Frequency Receiver

For the optimization of dynamic range and bandwidth of digital intermediate frequency receiver(DIFR), main factors affecting them and their relationships are studied. Firstly, the DIFR sensitivity, bandwidth, noise factor of radio frequency (RF) analog front-end (RFAF), and processing gain of intermediate frequency(IF) sampling are analyzed. Secondly, the constraint relationship of the noise factor of RFAF, the signal-to-noise ratio of ADC and the dynamic range of DIFR are studied. The relationship between the dynamic range and the RFAF gain, and that of the extended dynamic range and the RF AGC(automatic gain control) step are educed and simulated. These results can be used as theory foundations and design references for the implementation and optimization of the large dynamic range and wideband DIFR.

A Novel Receiver Architecture for DBF Antenna Array

The developments of the high speed analog to digital converters （ADC） and advanced digital signal processors （DSP） make the smart antenna with digital beamforming （DBF） a reality. In conventional M-elements array antenna system, each element has its own receiving channel and ADCs. In this paper, a novel smart antenna receiver with digital beamforming is proposed. The essential idea is to realize the digital beamforming receiver based on bandpass sampling of multiple distinct intermediate frequency （IF） signals. The proposed system reduces receiver hardware from M IF channels and 2M ADCs to one IF channel and one ADC using a heterodyne radio frequency （RF） circuitry and a multiple bandpass sampling digital receiver. In this scheme, the sampling rate of the ADC is much higher than the summation of the M times of the signal bandwidth. The local oscillator produces different local frequency for each RF channel The receiver architecture is presented in detail, and the simulation of bandpass sampling of multiple signals and digital down conversion to baseband is given. The principle analysis and simulation results indicate the effectiveness of the new proposed receiver.

Wideband Signal Detection Based on MWC Discrete Compressed Sampling Structure

In order to solve the cross-channel signal problem caused by the uniform channelized wideband digital receiver when processing wideband signal and the problem that the sensitivity of the system greatly decreases when the bandwidth of wideband digital receiver increases,which both decrease the wideband radar signal detection performance,a new wideband digital receiver based on the modulated wideband converter(MWC)discrete compressed sampling structure and an energy detection method based on the new receiver are proposed.Firstly,the proposed receiver utilizes periodic pseudo-random sequences to mix wideband signals with baseband and other sub-bands.Then the mixed signals are low-pass filtered and downsampled to obtain the baseband compressed sampling data,which can increase the sensitivity of the system.Meanwhile,the cross-channel signal will all appear in any subbands,so the cross-channel signal problem can be solved easily by processing the baseband compressed sampling data.Secondly,we establish the signal detection model and formulate the criterion of the energy detection method.And we directly utilize the baseband compressed sampling data to carry out signal detection without signal reconstruction,which decreases the complexity of the algorithm and reduces the computational burden.Finally,simulation experiments demonstrate the effectiveness of the proposed receiver and show that the proposed signal detection method is effective in low signal-to-noise ratio(SNR)compared with the conventional energy detection and the probability of detection increases significantly when SNR increases.

An Intermediate Frequency Acquisition Scheme for S-band Single Access Link of the Tracking and Data Relay Satellite System

A nonzero intermediate frequency (IF) likelihood acquisition scheme designed for S-band Single Access (SSA) link of China’s Tracking and Data Relay Satellite System (CTDRSS) is introduced. The received signal is downconverted to IF, and then direct sampled in IF using a 1-bit A/D. After the digitalization, the sampled data is detected using a hybrid likelihood acquisition scheme. Using this structure, large noise figure of the analog mixer or active filters, amplitude and phase imbalance between low-frequency in-phase and quandrature-phase channel can be avoided. An easy designing algorithm of the acquisition scheme is also derived. The performance and algorithm are verified by computer simulation.

A programmable gain amplifier with digitally assisted DC offset calibration for a direct-conversion WLAN receiver

This paper presents a programmable gain amplifier（PGA） circuit with a digitally assisted DC offset cancellation（DCOC） scheme for a direct conversion WLAN receiver.Implemented in a standard 0.13-μm CMOS process,the PGA occupies 0.39 mm2 die area and dissipates 6.5 mW power from a 1.2 V power supply.By using a single loop single digital-to-analog converter（DAC） mixed signal DC offset cancellation topology,the minimum DCOC settling time achieved is as short as 1.6μs with the PGA gain ranging from -8 to 54 dB in a 2 dB step.The DCOC loop utilizes a segmented DAC structure to lower the design complexity without sacrificing accuracy and a digital control algorithm to dynamically set the DCOC loop to fast or normal response mode,making the PGA circuit in compliance with the targeted WLAN specifications.