EXACT ANALYSIS OF SPURIOUS SIGNALS IN DIRECT DIGITAL FREQUENCY SYNTHESIZERS DUE TO AMPLITUDE QUANTIZATION

Amplitude quantization is one of the main sources of spurious noise frequencies in Direct Digital Frequency Synthesizers (DDFSs), which affect their application to many wireless telecommu- nication systems. In this paper, two different kinds of spurious signals due to amplitude quantization in DDFSs are exactly formulated in the time domain and detailedly compared in the frequency do- main, and the effects of the DDFS parameter variations on the spurious performance are thoroughly studied. Then the spectral properties and power levels of the amplitude-quantization spurs in the absence of phase-accumulator truncation are emphatically analyzed by waveform estimation and computer simulation, and several important conclusions are derived which can provide theoretical support for parameter choice and spurious performance evaluation in the application of DDFSs.

Simulation of two-dimensional ISAR decoys on a moving platform

It is potentially useful to perform deception jamming using the digital image synthesizer （DIS） since it can form a two-dimensional （2D） decoy but suffers from multiple decoys ge- neration. Inspired by the intermittent sampling repeater jamming （ISRJ）, the generation of inverse synthetic aperture radar （ISAR） decoys is addressed, associated with the DIS and the ISRJ. Radar pulses are sampled intermittently and modulated by the scatter- ing model of a false target by mounting the jammer on a moving platform, and then the jamming signals are retransmitted to the radar and a train of decoys are induced after ISAR imaging. A scattering model of Yak-42 is adopted as the false-target mo- dulation model to verify the effectiveness of the jamming method based on the standard ISAR motion compensation and image for- mation procedure.

Low spurious noise frequency synthesis based on a DDS-driven wideband PLL architecture

An S-band frequency synthesizer for a stepped-frequency radar is presented. This frequen- cy synthesizer is based on a direct digital synthesizer （ DDS ） -driven wideband phase-locked loop （PLL） architecture which can achieve low spurious noise and rapid frequency hopping simultaneous- ly. The mechanism of introducing high level spurs by the images of DDS digital to analog convertor （DAC） output is analyzed. A novel DDS frequency planning method is proposed to ensure low col- ored noise within the entire bandwidth. The designed output frequency range is 3. 765 -4. 085 GHz, and the step size is 5 MHz with frequency agility of less than 1 μs. Measured results demonstrate that the average spurious free dynamic range （SFDR） is about 64 dBc in a 320 MHz bandwidth.

DDFS spurious signals due to amplitude quantization in absence of phase-accumulator truncation

Spurious signals in direct digital frequency synthesizers （DDFSs） are partly caused by amplitude quantization and phase truncation, which affect their application to many wireless telecommunication systems. These signals are deterministic and periodic in the time domain, so they appear as line spectra in the frequency domain. Two types of spurious signals due to amplitude quantization are exactly formulated and compared in the time and frequency domains respectively. Then the frequency spectra and power levels of the spurious signals due to amplitude quantization in the absence of phase-accumulator truncation are emphatically analyzed, and the effects of the DDFS parameter variations on the spurious signals are thoroughly studied by computer simulation. And several important conclusions are derived which can provide theoretical support for parameter choice and spurious performance evaluation in the application of DDFSs.

Design of remote ultrasonic signal generating system based on Kinetis60 and AD9951

A kind of remote ultrasonic generating system is designed in this paper.Microcontroller unit(MCU)Kinetis60and direct digital synthesizer(DDS)AD9951constitute the core section of this ultrasonic generating terminal in this system.A friendly and easy-operating host computer software is contrived to control the terminal to generate sinusoidal,rectangular and triangular waveform with variable frequency,amplitude and phase through ZigBee wireless transmission protocol.In order to enhance the practical driving ability,this system also includes power amplifier circuit and transformer matching design,which enable the ultrasonic generating terminal to output enough power for applying to different types of ultrasonic energy convertors.Through experimental verification,the host computer can precisely and swiftly control the ultrasonic generating terminal to generate the above three waveforms with variable wave elements.Oscilloscope is used to verify the terminal output performance of this remote system.

Measurement of soil electrical conductivity based on direct digital synthesizer(DDS)and digital oscilloscope

A soil electrical conductivity(EC)measurement system based on direct digital synthesizer(DDS)and digital oscilloscope was developed.The system took the“current-voltage four-electrode method”as the design principal and adopted a six-pin structure of the probe,two center pins to measure the soil EC in shallow layer,two outside pins to measure the soil EC in deep layer,and two middle pins for inputting the driving current.A signal generating circuit using DDS technology was adopted to generate sine signals,which was connected with the two middle pins.A digital oscilloscope was used to record and store the two soil output signals with noises in microseconds,which were from the two center pins and two outside pins,respectively.Then a digital bandpass filter was used to filter the soil output signals recorded by the digital oscilloscope.Compared with the traditional analog filter circuit,the digital filter could filter out the noises of all frequency except for the frequency of the excitation source.It could improve the effect of filtering and the accuracy of the soil EC measurement system.The DDS circuit could provide more stable sine signals with larger amplitudes.The use of digital oscilloscope enables us to analyze the soil output signals in microseconds and measure the soil EC more accurately.The new soil EC measurement system based on DDS and digital oscilloscope can provide a new effective tool for soil sensing in precision agriculture.

A high speed direct digital frequency synthesizer realized by a segmented nonlinear DAC

This paper presents a high speed ROM-less direct digital frequency synthesizer （DDFS） which has a phase resolution of 32 bits and a magnitude resolution of 10 bits. A 10-bit nonlinear segmented DAC is used in place of the ROM look-up table for phase-to-sine amplitude conversion and the linear DAC in a conventional DDFS. The design procedure for implementing the nonlinear DAC is presented. To ensure high speed, current mode logic （CML） is used. The chip is implemented in Chartered 0.35μm COMS technology with active area of 2.0 × 2.5 mm^2 and total power consumption of 400 mW at a single 3.3 V supply voltage. The maximum operating frequency is 850 MHz at room temperature and 1.0 GHz at 0℃.

A high-performance MUX-direct digital frequency synthesizer with quarter ROMs

This paper presents a detailed description of a high-performance direct digital frequency synthesizer （DDFS） using optimized quarter ROMs. To improve the working frequency and spectral purity, an original quarter ROMs structure in 0.13 μm CMOS is brought forward and implemented. The working frequency is increased by 40% compared with Yuan Ling＇s methodIll of implementing a segmented DAC based DDFS. It has been implemented in 0.13 μm CMOS technology. The DDFS has a resolution of 10 bits with a measured SFDR 54 dBc. Its maximum operating frequency is 1.2 GHz by using six pipelining stages. Analytical investigation of improving spectral performances by using dual-slope approximation and pipeline is also presented.

A high speed direct digital frequency synthesizer based on multi-channel structure

This paper presents a direct digital frequency synthesizer （DDFS） for high speed application based on multi-channel structure. This DDFS has phase resolution of 32 bits and magnitude resolution of 12 bits. In order to ensure the high speed and high resolution at the same time, the multi-channel sampling technique is used and a 12 bits linear digital-to-analog converter is implemented. The chip is fabricated in TSMC 130 nm CMOS technology with active area of 0.89 x 0.98 mm2 and total power consumption of 300 mW at a single 1.2 V supply voltage. The maximum operating speed is up to 2.0 GHz at room temperature.

Design of Linear Sweep Source Based on DDS Used in Readout System for Wireless Passive Pressure Sensor

This paper proposes the design and research on the high bandwidth linear frequency sweep signal source involved in the readout unit module of the wireless passive pressure sensor in high temperature based on the principle of mutual inductance coupling which is applied widely at present. The operating principle of the linear sweep frequency source based on the direct digital frequency synthesis （DDS） technology is introduced, and the implementation method of the hardware circuit and logic sequential control process required in our system has been realized utilizing this technology. Through the experiments under different conditions of the step value, the sweep range and other related design indicators, the influence on the extraction method of resonance frequency information, extraction accuracy, and others during the readout system of the mutual inductance coupling sensor are analyzed and studied. The design of the linear frequency sweep signal source is realized with a resonance frequency change resolution of 6 kHz, a minimum step value of 1 kHz, and a precision of frequency for 0.116 Hz within the sweep width of 1 MHz - 100MHz. Due to the use of the integrated commercial chip, the linear sweep frequency source is made small in size, high working frequency, high resolution and low step values for the readout unit modularized of a higher application value.