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A 1.2-V,84-dB∑△ADM in 0.18-μm digital CMOS technology
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作者 殷树娟 李翔宇 《Journal of Semiconductors》 EI CAS CSCD 2013年第8期90-93,共4页
A low power and low voltage∑△analog-to-digital modulator is realized with digital CMOS technology, which is due to full compensated depletion mode capacitors.Compared with mixed signal technology,this type of modula... A low power and low voltage∑△analog-to-digital modulator is realized with digital CMOS technology, which is due to full compensated depletion mode capacitors.Compared with mixed signal technology,this type of modulator is more compatible for pure digital applications.A pseudo-two-stage class-AB OTA is used in switchedcapacitor integrators for low voltage and low power.The modulator is realized in standard SMIC 0.18μm 1P6M digital CMOS technology.Measured results show that with 1.2 V supply voltage and a 6 MHz sample clock,the dynamic range of the modulator is 84 dB and the total power dissipation is 2460μW. 展开更多
关键词 digital CMOS technology low power low voltage analog-to-digital modulator sigma delta
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