An 80-GHz DCO based on modified hybrid tuning banks is introduced in this paper.To achieve sub-MHz frequency res-olution with reduced circuit complexity,the improved circuit topology replaces the conventional circuit ...An 80-GHz DCO based on modified hybrid tuning banks is introduced in this paper.To achieve sub-MHz frequency res-olution with reduced circuit complexity,the improved circuit topology replaces the conventional circuit topology with two binary-weighted SC cells,enabling eight SC-cell-based improved SC ladders to achieve the same fine-tuning steps as twelve SC-cell-based conventional SC ladders.To achieve lower phase noise and smaller chip size,the promoted binary-weighted digi-tally controlled transmission lines(DCTLs)are used to implement the coarse and medium tuning banks of the DCO.Compared to the conventional thermometer-coded DCTLs,control bits of the proposed DCTLs are reduced from 30 to 8,and the total length is reduced by 34.3%(from 122.76 to 80.66μm).Fabricated in 40-nm CMOS,the DCO demonstrated in this work fea-tures a small fine-tuning step(483 kHz),a high oscillation frequency(79-85 GHz),and a smaller chip size(0.017 mm^(2)).Com-pared to previous work,the modified DCO exhibits an excellent figure of merit with an area(FoMA)of-198 dBc/Hz.展开更多
基金This work is supported by the National Natural Science Foundation of China(No.61674036)the National Key Research and Development Program of China(No.2018YFB2202200).
文摘An 80-GHz DCO based on modified hybrid tuning banks is introduced in this paper.To achieve sub-MHz frequency res-olution with reduced circuit complexity,the improved circuit topology replaces the conventional circuit topology with two binary-weighted SC cells,enabling eight SC-cell-based improved SC ladders to achieve the same fine-tuning steps as twelve SC-cell-based conventional SC ladders.To achieve lower phase noise and smaller chip size,the promoted binary-weighted digi-tally controlled transmission lines(DCTLs)are used to implement the coarse and medium tuning banks of the DCO.Compared to the conventional thermometer-coded DCTLs,control bits of the proposed DCTLs are reduced from 30 to 8,and the total length is reduced by 34.3%(from 122.76 to 80.66μm).Fabricated in 40-nm CMOS,the DCO demonstrated in this work fea-tures a small fine-tuning step(483 kHz),a high oscillation frequency(79-85 GHz),and a smaller chip size(0.017 mm^(2)).Com-pared to previous work,the modified DCO exhibits an excellent figure of merit with an area(FoMA)of-198 dBc/Hz.
