Applications of cascade multilevel inverters

Cascade multilevel inverters have been developed for electric utility applications. A cascade M level inverter consists of (M 1)/2 H bridges in which each bridge's dc voltage is supported by its own dc capacitor. The new inverter can: (1) generate almost sinusoidal waveform voltage while only switching one time per fundamental cycle; (2) dispense with multi pulse inverters' transformers used in conventional utility interfaces and static var compensators; (3) enables direct parallel or series transformer less connection to medium and high voltage power systems. In short, the cascade inverter is much more efficient and suitable for utility applications than traditional multi pulse and pulse width modulation (PWM) inverters. The authors have experimentally demonstrated the superiority of the new inverter for power supply, (hybrid) electric vehicle (EV) motor drive, reactive power (var) and harmonic compensation. This paper summarizes the features, feasibility, and control schemes of the cascade inverter for utility applications including utility interface of renewable energy, voltage regulation, var compensation, and harmonic filtering in power systems. Analytical, simulated, and experimental results demonstrated the superiority of the new inverters.

A Space Vector PWM Scheme for Multilevel Inverters Based on Two-Level Space Vector PWM

Ⅰ. INTRODUCTION MULTILEVEL inverters are increasingly being used in high-power medium voltage applications due to their superior performance compared to two-level inverters, such as lower common-mode voltage, lower dv/dt, lower harmonics in output voltage and current, and reduced voltage on the power switches.

Modeling and Analysis of Novel Multilevel Inverter Topology with Minimum Number of Switching Components

This paper proposes a novel single phase symmetrical and asymmetrical type extendable multilevel inverter topology with minimum number of switches.The basic circuit of the proposed inverter topology consist of four dc voltage sources and 10 main switches which synthesize 9-level output voltage during symmetrical operation and 17-level output voltage during asymmetrical operation.The comparison between the proposed topology with conventional and other existing inverter topologies is presented in this paper.The advantages of the proposed inverter topology include minimum switches,less harmonic distortion and minimum switching losses.The performance of the proposed multilevel inverter topology has been analyzed in both symmetrical and asymmetrical conditions.The simulation model is developed using MATLAB/SIMULINK software to verify the performance of the proposed inverter.

Multilevel Feature Moving Average Ratio Method for Fault Diagnosis of the Microgrid Inverter Switch

Multilevel feature moving average ratio method is proposed to realize an open-switch fault diagnosis for any switch of the microgrid inverter. The main steps of the proposed method include multilevel signal decomposition, coefficient reconstruction, absolute average ratio process and artificial neural network U+0028 ANN U+0029 classification. Specifically, multilevel signal decomposition is realized by using the means of multi resolution analysis to obtain the different frequency band coefficients of the three-phase current signal. The related coefficient reconstruction is executed to achieve signals decomposition in different levels. Furthermore, according to the obtained data, the absolute average ratio process is used to extract absolute moving average ratio of signal decomposition in different levels for the three-phase current. Finally, to intelligently classify the inverter switch fault and realize the adaptive ability, the ANN technology is applied. Compared to conventional fault diagnosis methods, the proposed method can accurately detect and locate the open-switch fault for any location of the microgrid inverter. Additionally, it need not set related threshold of algorithm and does not require normalization process, which is relatively easy to implement. The effectiveness of the proposed fault diagnosis method is demonstrated through detailed simulation results. © 2017 Chinese Association of Automation.

A new multilevel voltage source inverter configuration with minimum number of circuit elements

An advanced configuration for multilevel voltage source converters is proposed. The proposed converter is able to apply asymmetrical DC sources. The configuration of the proposed inverter is well designed in order to provide the maximum number of voltage levels in output terminals using lower number of circuit devices. The authority of the proposed inverter versus the conventional H-bridge cascaded inverter and the most recently introduced ones, is verified with a provided comparison study. The proposed inverter is able to generate the desired voltage levels using a lower number of circuit devices including power semi-conductor switches, IGBTs, diodes, related gate driver circuits of switches and DC voltage sources. As a result, the total cost and installation area are considerably reduced and the control scheme gets simpler. To confirm the feasibility of the proposed multilevel structure, both the simulation and experimental results are provided and compared which shows good agreements.

Analysis of Reduced Switch Topology Multilevel Inverter with Different Pulse Width Modulation Technique and Its Application with DSTATCOM

Multilevel inverter has played a vital role in medium and high power applications in the recent years. In this paper, Reduced Switch Count Multi Level Inverter structure (RSCMLI) topology is presented with different pulse width modulation techniques. The harmonic level analysis is carried out for the reduced switch count multilevel inverter with the different PWM technique such as with Alternate Phase Opposition Disposition (APOD) method, In Phase Disposition (IPD) method and multi reference pulse width modulation method for five level, seven level , nine level and eleven level inverter. The simulation results are compared with the cascaded H Bridge Multi Level Inverter (CHBMLI). The nine level RSCMLI inverter with APOD method is used for the Distribution Static Synchronous Compensator (DSTATCOM) application in the nonlinear load connected system for power factor improvement. The result shows that the harmonic level and the number of switches required for RSCMLI is reduced compared to CHBMLI. RSCMLI employed in DSTATCOM improves the power factor and harmonic level of the system when it is connected to the nonlinear load.

A Novel Topology of Hybrid Multilevel Inverter with Minimum Number of Separated DC Sources

Multilevel inverter has become increasingly popular in recent years due to advantages of high power quality waveforms, low switching losses, and high-voltage capability. A novel multilevel inverter with minimum number of separated DC sources is presented in this paper. Three-phase output voltages of this inverter can easily be balanced because they are synthesized by using the same DC sources. A harmonic reduction method eliminating both the 5th and 7th harmonics is proposed. Finally, comparison results and spectral analysis are presented. Key words multilevel inverter - topology - DC source - harmonic reduction - spectrum Project supported by the Postdoctoral Science Foundation of Shanghai (Grant No. kO7)

Efficient Choice of a Multilevel Inverter for Integration on a Hybrid Wind-Solar Power Station

DC/AC converters are very important components that have to be chosen efficiently for each type of power station. In this article, we present in details, a comparison between three different architectures of multilevel inverters, the flying capacitor multilevel inverter (FCMLI), the diode clamped multilevel inverter (DCMLI), and the cascaded H-bridge multilevel inverter (CHMLI). Thus the comparison is focused on the output voltage quality, the complexity of the power circuits, the cost of implementation, and the influence on a power bank inside the renewable power station. We also investigate trough simulation the efficient number of levels and suitable characteristics for the CHMLI that showed the most promising performance. The study uses Matlab Simulink platform as a tool of simulation, and aim to choose the most qualified inverter, for a potential insertion on a hybrid renewable energy platform (wind-solar). In all the simulations we use the same PWM control type (SPWM).

Simulation and Analysis of a Multilevel Converter Topology for Solar PV Based Grid Connected Inverter

There has been a noticeable increase in use of Solar PV based systems for power generation, given its renewable nature. A solar PV based grid tie inverters are used for dc-ac conversion. The conventional line commutated ac-to-dc inverters have square-shaped line current which contains higher-order harmonics. The line current with the high harmonic contents generates EMI and moreover it causes more heating of the core of distribution/power transformers. Alternatively, PWM based inverters using MOSFET/IGBT switches are also used for the same purpose. However, apart from higher switching losses, the power handling capability and reliability of these devices are quite low in comparison to thyristors/SCR. Nevertheless, the conventional thyristor based forced commutated inverters are not suitable for PWM applications due to the problems of commutation circuits. A pure sinusoidal line current or waveform with low har- monic contents is the most desirable. In the present work, a multilevel line commutated inverter topology has been proposed and analyzed which improves the wave shape and hence reduces the total harmonic distortion (THD) of the line current in a grid tie line commutated inverter. The scheme has successfully been implemented and tested. Moreover, the performance of the proposed topology is far better than the conventional line-commutated inverter. It reduces THD, losses, switching stress and EMI.

A Sensor-less Surface Mounted PMSM for Electronic Speed Control in Multilevel Inverter

Recent advancements in power electronics technology evolves inverter fed electric motors.Speed signals and rotor position are essential for controlling an electric motor accurately.In this paper,the sensorless speed control of surface-mounted permanent magnet synchronous motor(SPMSM)has been attempted.SPMSM wants a digital inverter for its precise working.Hence,this study incor-poratesfifteen level inverter to the SPMSM.A sliding mode observer(SMO)based sensorless speed control scheme is projected to determine rotor spot and speed of the multilevel inverter(MLI)fed SPMSM.MLI has been operated using a multi carrier pulse width modulation(MCPWM)strategy for generation offif-teen level voltages.The simulation works are executed with MATLAB/SIMU-LINK software.The steadiness and the heftiness of the projected model have been investigated under no loaded and loaded situations of SPMSM.Furthermore,the projected method can be adapted for electric vehicles.

Minimization of Switching Devices and Driver Circuits in Multilevel Inverter

The various configurations of multilevel inverter involve the use of more numbers of switching devices, energy storage devices and/or unidirectional devices. Each switching unit necessitates the add-on driver circuit for proper functionality. Cascaded H-Bridge Multilevel Inverter requires overlapped switching pulses for the switching devices in positive and negative arms of the bridge which may lead to short circuit during the device failure. This work addresses the problems in different configurations of multilevel inverter by using reduced number of switching and energy storage devices and driver circuits. In the present approach Single Switch is used for each stair case positive output and single H-Bridge for phase reversal. Driver circuits are reduced by using the property of body diode of the MOSFET. Switching pulses are generated by Arduino Development Board. The circuit is simulated using Matlab. More so, through experimental means, it is physically tested and results are analyzed for the 5-step inverter and thereby simulation is fully validated. Consequently, cycloconverter operation of the circuit is simulated using Matlab. Moreover, half bridge configuration of the multilevel inverter is also analyzed for high frequency induction heating applications.

Capacitor Pattern H-Bridge Multilevel Inverter (CPHMLI) Using Phase Diposition Pulse Width Modulation for Grid Applications

This work presents an implementation of an innovative single phase multilevel inverter using capacitors with reduced switches. The proposed Capacitor pattern H-bridge Multilevel Inverter (CPHMLI) topology consists of a proper number of Capacitor connected with switches and power sources. The advanced switching control supplied by Pulse Width Modulation (PDPWM) to attain mixed staircase switching state. The charging and discharging mode are achieved by calculating the voltage error at the load. Furthermore, to accomplish the higher voltage levels at the output with less number of semiconductors switches and simple commutation designed using CPHMLI topology. To prove the performance and effectiveness of the proposed approach, a set of experiments performed under various load conditions using MATLAB tool.

Intelligent-Based Maximum Power Extraction on Grid-Integrated Multilevel Inverter-Fed Wind-Driven Induction Generators

This paper presents an intelligent controller employing Adaptive Neuro-Fuzzy Inference System (ANFIS) for extracting maximum power from the wind energy conversion system even during the change in the wind speed conditions with improved quality of power. The proposed induction generator with multilevel inverter along with intelligent controller based Maximum Power Point Tracking (MPPT) technique aims at integrating winds system with improved maximum power injection and minimum harmonic issues. The proposed method will improve the power quality which is delivered to the grid in terms of harmonic, and inject the maximum power to the grid. To validate the effectiveness of the proposed control strategy, ANFIS controller, Fuzzy Inference System (FIS) and without MPPT controller have been presented and tested using MATLAB/Simulink environment.

A New Topology for a Single Phase Multilevel Voltage Source Inverter with Reduced Number of Components

Multilevel inverters have gained much attention for its operation involving applications ranging values of high power rating. This paper proposes a switching topology for asymmetric multilevel inverter utilizing less number of power electronics components. When the number of the output level increases, it requires more switching states and eventually the number of switching components. The increased number of switches results in higher switching losses which may lead to power loss, and reduction of efficiency of the overall conversion system. The salient feature of this proposed topology is that the module can be used as a sub multiple level structure and can be extended for any number of level with minimal increase in the switching components.

Analysis of Symmetrical and Asymmetrical Current Source Multilevel Inverter

The paper proposes a Current Source Multilevel Inverter (CSMLI) with single rating inductor topology. Multilevel inverters are most familiar with power converter’s applications due to reduced dv/dt, di/dt stress, and very efficient for reducing harmonic distortion in the output voltage and output current. The proposed nine-level current source inverter has been tested under symmetrical and asymmetrical modes of operation, and their activities are compared using PI and Fuzzy PI (Proportional Integral) controllers with multicarrier PWM (Pulse Width Modulation) strategy. MATLAB/Simulink simulation has been made for the proposed converter to obtain its performance measures. Some experimental results are given to verify the presented Current Source Multilevel Inverter.

Modeling and Analysis of Variable Frequency Inverted Sine PWM Technique for a Hybrid Cascaded Multilevel Inverter

In cascaded H-bridge multilevel inverter, a variable frequency inverted sine PWM technique is modeled for hybrid electric vehicles. It has a particular advantage of increasing power which is achieved using series connection of H-bridge and also this topology is capable to produce superior spectral quality with considerable improvement of fundamental voltage. The variable frequency inverted sine PWM technique produces lesser torque ripple and enhances the fundamental output voltage mainly at lower modulation index ranges. The topologies of multilevel inverter are flying capacitor, diode clamped and cascaded inverter. In the paper, we will discuss about the cascaded multilevel inverter based on inverted sine PWM technique. The two switching strategies widely used to control multilevel inverters are constant frequency inverted sine PWM (CF-ISPWM) and variable frequency inverted sine PWM (VF-ISPWM). This implies that switch utilization substantially reduces 32.35% of the constant frequency inverted sine PWM switching technique. The performance of the technique is validated in terms of Total Harmonic Distortion (THD) and Torque ripple which significantly reduces when compared to constant frequency ISPWM. The analysis of conventional triangular PWM inverter and inverted sine PWM inverter using constant and variable switching scheme is done in MATLAB Simulink and verified experimentally by FPGA Spartan 3E processor.

Hybrid Control Strategy for BCD Topology Based Modular Multilevel Inverter

In this paper, a Binary Coded Decimal (BCD) topology of modular multilevel inverter with reduced component count is proposed. For the control of this inverter, hybrid control strategy is used. The proposed modular multilevel inverter uses asymmetrical dc sources and reduced number of switches topology. This hybrid modulation technique uses the multicarrier based Pulse Width Modulation (PWM) and the fundamental frequency modulation strategy. The hybrid modulation algorithm is implemented with “NUC140” micro-controller. In comparison with the conventional and some of the recently reported inverter topologies, the proposed inverter topology is able to generate high number of voltage levels in the output by using minimum number of components such as dc sources, power switches and driver circuits. This inverter offers significant performance with less number of components. The feasibility of the proposed topology is confirmed by simulation and experimental results.

Harmonic Minimization in Seven Level Cascaded Multilevel Inverter Using Selective Harmonic Elimination PWM Techniques

This paper concentrates on enhancing the productivity of the multilevel inverter and nature of yield voltage waveform. Seven level lessened switches topology has been actualized with just seven switches. Essential Switching plan and Selective Harmonics Elimination were executed to diminish the Total Harmonics Distortion (THD) esteem. Selective Harmonics Elimination Stepped Waveform (SHESW) strategy is executed to dispense with the lower order harmonics. Fundamental switching plan is utilized to control the switches in the inverter. The proposed topology is reasonable for any number of levels. The harmonic lessening is accomplished by selecting fitting switching angles. It indicates would like to decrease starting expense and unpredictability consequently it is able for modern applications. In this paper, third and fifth level harmonics have been disposed of. Simulation work is done utilizing the MATLAB/Simulink programming results have been displayed to accept the hypothesis.

Harmonic Minimization in Seven-Level Cascaded Multilevel Inverter Using Evolutionary Algorithm

Inverters are power electronic devices that change over DC to sinusoidal AC quantity. Be that as it may, in down to earth, these devices produce non-sinusoidal yield which contains harmonics, so as to blend a close sinusoidal component and to lessen the harmonic distortion multilevel inverters developed. Mathematical methods, which were developed, are derivative based and need initial considerations. To overcome this, evolutionary algorithms, which are derivative free and accurate, were developed for obtaining multi levels of output voltage. The proposed work uses two evolutionary algorithms, namely, Genetic Algorithm (GA) and Particle Swarm Optimization (PSO) algorithm. These algorithms are used to generate the switching angles by satisfying the non linear transcendental equations that govern the low order harmonic components. A seven level cascaded full bridge inverter is designed using MATLAB/Simulink and the results validate the results for switching angles. The Total Harmonic Distortion (THD) value obtained for GA and PSO is 11.81% and 10.84% respectively. The solution obtained from GA algorithm was implemented in hardware using dsPIC controller to validate the simulation results. The THD value obtained for cascaded seven-level multilevel inverter in the hardware prototype is 25.9%.