The direct current-direct current （DC-DC） converter is designed for 1 T static random access memory （SRAM） used in display driver integrated circuits （ICs）, which consists of positive word-line voltage （VpwL）,...The direct current-direct current （DC-DC） converter is designed for 1 T static random access memory （SRAM） used in display driver integrated circuits （ICs）, which consists of positive word-line voltage （VpwL）, negative word-line voltage （VinyL） and half-VDD voltage （VHDo） generator. To generate a process voltage temperature （PVT）-insensitive VpWL and VNWL, a set of circuits were proposed to generate reference voltages using bandgap reference current generators for respective voltage level detectors. Also, a VOWL regulator and a VNWL charge pump were proposed for a small-area and low-power design. The proposed VpwL regulator can provide a large driving current with a small area since it regulates an input voltage （VCI） from 2.5 to 3.3 V. The VmvL charge pump can be implemented as a high-efficiency circuit with a small area and low power since it can transfer pumped charges to VNWL node entirely. The DC-DC converter for 1 T SRAM were designed with 0.11 μm mixed signal process and operated well with satisfactory measurement results.展开更多
Some research efforts to improve the efficiency and noise performance of buck DC-DC converters are explored.A carefully designed power MOSFET driver,including a dead time controller,discontinuous current mode（DCM） c...Some research efforts to improve the efficiency and noise performance of buck DC-DC converters are explored.A carefully designed power MOSFET driver,including a dead time controller,discontinuous current mode（DCM） controller and gate width controller,is proposed to improve efficiency.Instead of PWM modulation, sigma-delta modulation is introduced into the feedback loop of the converter to move out the clock-referred harmonic spike.The proposed converter has been designed and fabricated by a 0.35μm CMOS process.Measured results show that the peak efficiency of the converter can reach 93%and sigma-delta modulation suppresses the harmonic spike by 30 dB over PWM modulation.展开更多
This paper presents a width controller,a dead time controller,a discontinuous current mode（DCM） controller and a frequency skipping modulation（FSM） controller for a high frequency high efficiency buck DC-DC conver...This paper presents a width controller,a dead time controller,a discontinuous current mode（DCM） controller and a frequency skipping modulation（FSM） controller for a high frequency high efficiency buck DC-DC converter. To improve the efficiency over a wide load range,especially at high switching frequency,the dead time controller and width controller are applied to enhance the high load efficiency,while the DCM controller and FSM controller are proposed to increase the light load efficiency.The proposed DC-DC converter controllers have been designed and fabricated in the Chartered 0.35μm CMOS process,and the measured results show that the efficiency of the buck DC-DC converter is above 80%over a wide load current range from 8 to 570 mA,and the peak efficiency is 86%at 10 MHz switching frequency.展开更多
High efficiency and fast dynamic response are two main control objectives for dual active bridge(DAB)DC-DC converters. Traditional extended phase shift(EPS)control can significantly enhance the conversion efficiency o...High efficiency and fast dynamic response are two main control objectives for dual active bridge(DAB)DC-DC converters. Traditional extended phase shift(EPS)control can significantly enhance the conversion efficiency of DAB DC-DC converters by reducing current stress;however, it cannot fulfill fast dynamic response requirements. In this paper, a novel hybrid control scheme consisting of EPS control and direct power control(DPC),named as EPS-DPC, is proposed. EPS-DPC control has salient features in both efficiency and dynamic performance. In order to verify the outstanding performance of the proposed EPS-DPC scheme, an experimental comparison was carried out on a scale-down DAB DC-DC converter among several control strategies, including single phase shift control with traditional voltage-loop(SPS-TVL), EPS control with traditional voltage-loop(EPSVTL), and EPS-DPC. Experimental results have been high consistent with theoretical analysis, and verified these advantages of the proposed EPS-DPC scheme.展开更多
基金supported by the Second Stage of Brain Korea 21 Projectsfinancially supported by Changwon National University in 2011-2013
文摘The direct current-direct current （DC-DC） converter is designed for 1 T static random access memory （SRAM） used in display driver integrated circuits （ICs）, which consists of positive word-line voltage （VpwL）, negative word-line voltage （VinyL） and half-VDD voltage （VHDo） generator. To generate a process voltage temperature （PVT）-insensitive VpWL and VNWL, a set of circuits were proposed to generate reference voltages using bandgap reference current generators for respective voltage level detectors. Also, a VOWL regulator and a VNWL charge pump were proposed for a small-area and low-power design. The proposed VpwL regulator can provide a large driving current with a small area since it regulates an input voltage （VCI） from 2.5 to 3.3 V. The VmvL charge pump can be implemented as a high-efficiency circuit with a small area and low power since it can transfer pumped charges to VNWL node entirely. The DC-DC converter for 1 T SRAM were designed with 0.11 μm mixed signal process and operated well with satisfactory measurement results.
基金Project supported by the National High Technology Research and Development Program of China(No.2009AA011607)
文摘Some research efforts to improve the efficiency and noise performance of buck DC-DC converters are explored.A carefully designed power MOSFET driver,including a dead time controller,discontinuous current mode（DCM） controller and gate width controller,is proposed to improve efficiency.Instead of PWM modulation, sigma-delta modulation is introduced into the feedback loop of the converter to move out the clock-referred harmonic spike.The proposed converter has been designed and fabricated by a 0.35μm CMOS process.Measured results show that the peak efficiency of the converter can reach 93%and sigma-delta modulation suppresses the harmonic spike by 30 dB over PWM modulation.
基金Project supported by the National Natural Science Foundation of China(No.60676013).
文摘This paper presents a width controller,a dead time controller,a discontinuous current mode（DCM） controller and a frequency skipping modulation（FSM） controller for a high frequency high efficiency buck DC-DC converter. To improve the efficiency over a wide load range,especially at high switching frequency,the dead time controller and width controller are applied to enhance the high load efficiency,while the DCM controller and FSM controller are proposed to increase the light load efficiency.The proposed DC-DC converter controllers have been designed and fabricated in the Chartered 0.35μm CMOS process,and the measured results show that the efficiency of the buck DC-DC converter is above 80%over a wide load current range from 8 to 570 mA,and the peak efficiency is 86%at 10 MHz switching frequency.
基金supported by the National Natural Science Foundation of China(No.51577160)
文摘High efficiency and fast dynamic response are two main control objectives for dual active bridge(DAB)DC-DC converters. Traditional extended phase shift(EPS)control can significantly enhance the conversion efficiency of DAB DC-DC converters by reducing current stress;however, it cannot fulfill fast dynamic response requirements. In this paper, a novel hybrid control scheme consisting of EPS control and direct power control(DPC),named as EPS-DPC, is proposed. EPS-DPC control has salient features in both efficiency and dynamic performance. In order to verify the outstanding performance of the proposed EPS-DPC scheme, an experimental comparison was carried out on a scale-down DAB DC-DC converter among several control strategies, including single phase shift control with traditional voltage-loop(SPS-TVL), EPS control with traditional voltage-loop(EPSVTL), and EPS-DPC. Experimental results have been high consistent with theoretical analysis, and verified these advantages of the proposed EPS-DPC scheme.
