电子印章在我国电子政务和电子商务领域正发挥着越来越重要的作用,基于数字签名和数字水印的电子印章解决方案还在发展完善中。该文遵循Domino—PDF—DSA这一技术路线,综合运用Lotus平台的PKI技术和PDF的数字签名技术,借助Notes C API和...电子印章在我国电子政务和电子商务领域正发挥着越来越重要的作用,基于数字签名和数字水印的电子印章解决方案还在发展完善中。该文遵循Domino—PDF—DSA这一技术路线,综合运用Lotus平台的PKI技术和PDF的数字签名技术,借助Notes C API和PDF API作二次开发,将电子印章图像作为Notes ID文件的扩展部分,在Lotus平台上实现了对PDF文档加盖电子印章的应用系统。展开更多
Two new circuit techniques to suppress leakage currents and enhance noise immunity while decreasing the active power are proposed. Eight-input OR gate circuits constructed with these techniques are simulated using 45n...Two new circuit techniques to suppress leakage currents and enhance noise immunity while decreasing the active power are proposed. Eight-input OR gate circuits constructed with these techniques are simulated using 45nm BSIM4 SPICE models in HSPICE. The simulation results show that the proposed circuits effectively lower the active power, reduce the total leakage current, and enhance speed under similar noise immunity conditions. The active power of the two proposed circuits can be reduced by up to 8. 8% and 11.8% while enhancing the speed by 9.5% and 13.7% as compared to dual Vt domino OR gates with no gating stage. At the same time,the total leakage currents are also reduced by up to 80.8% and 82.4% ,respectively. Based on the simulation results,the state of the evaluation node is also discussed to reduce the total leakage currents of dual Vt dominos.展开更多
文摘电子印章在我国电子政务和电子商务领域正发挥着越来越重要的作用,基于数字签名和数字水印的电子印章解决方案还在发展完善中。该文遵循Domino—PDF—DSA这一技术路线,综合运用Lotus平台的PKI技术和PDF的数字签名技术,借助Notes C API和PDF API作二次开发,将电子印章图像作为Notes ID文件的扩展部分,在Lotus平台上实现了对PDF文档加盖电子印章的应用系统。
文摘Two new circuit techniques to suppress leakage currents and enhance noise immunity while decreasing the active power are proposed. Eight-input OR gate circuits constructed with these techniques are simulated using 45nm BSIM4 SPICE models in HSPICE. The simulation results show that the proposed circuits effectively lower the active power, reduce the total leakage current, and enhance speed under similar noise immunity conditions. The active power of the two proposed circuits can be reduced by up to 8. 8% and 11.8% while enhancing the speed by 9.5% and 13.7% as compared to dual Vt domino OR gates with no gating stage. At the same time,the total leakage currents are also reduced by up to 80.8% and 82.4% ,respectively. Based on the simulation results,the state of the evaluation node is also discussed to reduce the total leakage currents of dual Vt dominos.