Process Analysis of Double Circuit Transmission Line Trip-out on the Same Tower Due to Lightning

In recent years,several failures of double circuit transmission line on the same tower due to lightning were happened in Beijing power grid.Although it can be reclosed successful,the lightning strike caused a grave threat to the power grid security.The cause of the accident and the accident process were studied for the sake of further understanding of the impact of lightning on power grid.As an example,110 kV double circuit transmission line(Xilong-line) was analyzed.At first,the system topology was given.Through the analysis on relay protection actions and the fault recorder data,over voltage on the insulator strings was calculated.Based on the analysis and the calculation,accident cause and the process were presented respectively.Secondly,it comes to the conclusion that the lightning failure was caused by counterattack.The wave of the lightning over voltage would spread to the not grounded neutral point of the transformers,and make the neutral protective gap breakdown,then cause freewheeling with the frequency of 50 Hz.As results of the relay protection,the double circuit transmission line all tripped out.Finally,the causes of the accident were proposed that included terrain features,large corner towers,strong thunderstorm weather and poor grounded contact of the tower.

THE SCITECH TOWER & PLACE AWARDED DOUBLE AUTHENTICATION

At present, as capital well-known office building, the SCITECHTOWER & PLACE achieved authenticated certificates of ISO 14001both international and China environmental management system fromUKAS and CACEB. It’s the first time for an office building gained thedouble authentication in mainland. Ms. Zhang Keping, general managerof the SCITECH TOWER & PLACE claimed that, it’s the

A New Principle of Fault Identification of on the Same Tower Based on Traveling Wave Reactive Powers

In order to improve the reliability of fault identification of the double-circuit transmission lines on the same tower, a new algorithm for fast protection of double-circuit transmission lines on the same tower based on the reactive powers of traveling wave is proposed. With the implementation of S-transform, the initial traveling wave reactive powers are calculated and the change characteristics of reactive power under different fault conditions are studied. The protection criterion is constructed by analyzing the ratio of the reactive powers of the same end on double-circuit transmission lines and the ratio of the reactive powers at both ends on the same line. According to the ratio of reactive power on the same side of the line and both ends of the same line, it is possible to identify whether the faults of the double-circuit line of the same tower occurred in or out of the protection zone. A large number of simulation results show that the protection performance is sensitive and reliable, and quick to respond. The criterion is simple and is basically not affected by fault initial angles, fault types, and transitional resistances.

A General Method in the Synthesis of Ternary Double Pass-Transistor Circuits

A general method for designing ternary circuits using double pass-transistor logic is investigated. The logical relation of each MOS transistor is formulated by using the transmission operation in order to make effective and practical use of the circuits. A way to generate ternary complementary and dual circuits by applying the complementarity and duality principles is presented. This new static ternary double pass-transistor logic scheme has some favorable properties：the use of standard CMOS process without any modification of the thresholds, a perfectly symmetrical structure,a full logic swing, the maximum possible noise margins, a less complex structure, and no static power consumption. HSPICE simulations using TSMC 0.25μm CMOS technology and a 3V power supply demonstrate the effectiveness of the proposed design.

Characterization of a New DC-Glow Discharge Plasma Set-Up to Enhance the Electronic Circuits Performance

The (DC-GDPAU) is a DC glow discharge plasma experiment that was designed, established, and operated in the Physics Department at Ain Shams University (Egypt). The aim of this experiment is to study and improve some properties of a printed circuit board (PCB) by exposing it to the plasma. The device consists of cylindrical discharge chamber with movable parallel circular copper electrodes (cathode and anode) fixed inside it. The distance between them is 12 cm. This plasma experiment works in a low-pressure range (0.15 - 0.70 Torr) for Ar gas with a maximum DC power supply of 200 W. The Paschen curves and electrical plasma parameters (current, volt, power, resistance) characterized to the plasma have been measured and calculated at each cm between the two electrodes. Besides, the electron temperature and ion density are obtained at different radial distances using a double Langmuir probe. The electron temperature (KTe) was kept stable in range 6.58 to 10.44 eV;whereas the ion density (ni) was in range from 0.91 × 1010 cm−3 to 1.79 × 1010 cm−3. A digital optical microscope (800×) was employed to draw a comparison between the pre-and after effect of exposure to plasma on the shaping of the circuit layout. The experimental results show that the electrical conductivity increased after plasma exposure, also an improvement in the adhesion force in the Cu foil surface. A significant increase in the conductivity can be directly related to the position of the sample surfaces as well as to the time of exposure. This shows the importance of the obtained results in developing the PCBs manufacturing that uses in different microelectronics devices like those onboard of space vehicles.

Quantum fluctuations of mesoscopic damped double resonance RLC circuit with mutual capacitance-inductance coupling

Based on the scheme of damped harmonic oscillator quantization and thermo-field dynamics （TFD）, the quantization of mesoscopic damped double resonance RLC circuit with mutual capacitance-inductance coupling is proposed. The quantum fluctuations of charge and current of each loop in a squeezed vacuum state are studied in the thermal excitation case. It is shown that the fluctuations not only depend on circuit inherent parameters, but also rely on excitation quantum number and squeezing parameter. Moreover, due to the finite environmental temperature and damped resistance, the fluctuations increase with the temperature rising, and decay with time.

A G-band terahertz monolithic integrated amplifier in 0.5-μm InP double heterojunction bipolar transistor technology

Design and characterization of a G-band（140–220 GHz） terahertz monolithic integrated circuit（TMIC） amplifier in eight-stage common-emitter topology are performed based on the 0.5-μm In Ga As/In P double heterojunction bipolar transistor（DHBT）. An inverted microstrip line is implemented to avoid a parasitic mode between the ground plane and the In P substrate. The on-wafer measurement results show that peak gains are 20 dB at 140 GHz and more than 15-dB gain at 140–190 GHz respectively. The saturation output powers are-2.688 dBm at 210 GHz and-2.88 dBm at 220 GHz,respectively. It is the first report on an amplifier operating at the G-band based on 0.5-μm InP DHBT technology. Compared with the hybrid integrated circuit of vacuum electronic devices, the monolithic integrated circuit has the advantage of reliability and consistency. This TMIC demonstrates the feasibility of the 0.5-μm InGaAs/InP DHBT amplifier in G-band frequencies applications.

Design and Simulation of Solid State Pulser with Fast Rise Time and Double-exponential Waveform

Voltage pulses with fast rise time can be obtained from Marx circuits based on avalanche transistors. In this research, the ZETEX avalanche transistors are used as the switches in a Marx circuit to generate stable voltage pulses with double-exponential waveform and fast rise time. By using these transistors, the circuit is able to generate higher pulsed voltage with fewer stages. A three stages and a ten stages Marx circuit, as well as their triggering circuits, are designed. The two Marx circuits are also tested by simulations based on the Pspice code and by experiments, results of which are consistent with each other. With the ten stages Marx circuit, we obtain positive and negative pulses with the rise time of about 1.5 ns, the amplitude above 1 100 V, and the pulse width below 5 ns. It is proved that the proposed Marx circuit equipped with avalanche transistors could be an effective kind of solid-state pulse generator.

Protection of ±500 kV HVDC Double-circuit Converter Station from Lightning Induced Overvoltage

In order to obtain reasonable schemes of arrester in converter stations, the arrester scheme of "Xiluodu-Guangdong HVDC ± 500 kV double circuit transmission" project against lighting induced overvoltage, which was designed according to the main principle of lightning protection in converter station, is discussed. A calculation of the lighting induced overvoltage in Zhaotong converter station un- der various operation modes is performed with ATP-EMTP software, then the surge arrester configuration of the converter station is decided, and the arrester protection schemes of smoothing reactor and neutral line are studied. It is concluded that additional protection is necessary because of the relatively large gap between protected disconnecting switch and arrester of metallic return transfer bus. Plus, the smoothing reactor (SR) arrester near the valve hall could be removed to improve the scheme’s economic performance.

Comparative Analysis of Two Energy-Efficient Technologies Used in the Shanghai Tower

Climate change continues to affect the lives of individuals across the world, creating a rise in demand for new technologies that can slow down the impacts of climate change. Shanghai, one of the largest cities in the world, has one of the highest carbon emission levels. In recent years, the research and development of energy-efficient technologies have gained more and more attention. The Shanghai Tower is a pioneer in green building design and a prominent example of Shanghai’s efforts towards low-carbon city development. In this paper, two technologies within the Shanghai Tower—ground source heat pumps (GSHP) and double skin facades (DSF)—will be analyzed. The paper will consist of firstly an investigation of the principles of the technologies, and then analysis, evaluation, and comparison of their respective characteristics. While both GSHP and DSF are used for sustainable purposes, the effectiveness of technologies depends on what environment the technology is used in and what purpose they serve. The evaluation of GSHP and DSF will be based on their performances under Shanghai’s climate and whether they contribute to the purposes of the Shanghai Tower.

A Novel Fault Location Algorithmfor Double-Circuit Transmission Lines based on Distributed Parameter

Anewfault location algorithmfor double-circuit transmissionlines is described inthis paper.Theproposed method uses data extractedfromtwo ends of the transmissionlines andthus eliminates the effects ofthe source impedance andthe fault resistance.The distributed parameter model and the modal transformationare also employed.Depending on modal transformation,the coupled equations of the lines are converted intodecoupled ones.Inthis way,the mutual coupling effects between adjacent circuits of the lines are eliminatedandtherefore an accurate fault location can be achieved.The proposed methodis tested via digital simulationusing EMTP in conjunction with MATLAB.The test results corroborate the high accuracy of the proposedmethod.

Fault Locator Using Two-end Unsynchronized Measurements for UHV Series Compensated Double-circuit Lines

An accurate fault location algorithm for double-circuit series compensated lines is presented.Use of two-end unsynchronized measurements of current and voltage signals is considered.The algorithm applies two subroutines,designated for locating faults on particular line sections,and additionally the procedure for selecting the valid subroutine.The subroutines are formulated with use of the generalized fault loop model and the distributed parameter line model is applied.Performed ATP-EMTP based evaluation has shown the validity of the derived fault location algorithm and its high accuracy.

A High Efficiency Hardware Implementation of S-Boxes Based on Composite Field for Advanced Encryption Standard

The SubBytes (S-box) transformation is the most crucial operation in the AES algorithm, significantly impacting the implementation performance of AES chips. To design a high-performance S-box, a segmented optimization implementation of the S-box is proposed based on the composite field inverse operation in this paper. This proposed S-box implementation is modeled using Verilog language and synthesized using Design Complier software under the premise of ensuring the correctness of the simulation result. The synthesis results show that, compared to several current S-box implementation schemes, the proposed implementation of the S-box significantly reduces the area overhead and critical path delay, then gets higher hardware efficiency. This provides strong support for realizing efficient and compact S-box ASIC designs.

Research on Total Electric Field for DC Lines Converted from Double-Circuit AC Lines

With rapid growth of power demand, transmission capacity is also in urgent need of upgrading. In some cases, converting existing AC transmission lines to DC lines can Improve the transmission capacity and reduce the construction investment. In this paper, the upstream finite element method was expanded to calculate the total electric field of same tower multi-circuit DC lines converted from double-circuit AC lines, and the validity of the algorithm was confirmed by experiments. Taking a DC line converted from a typical same tower 500 kV double-circuit AC transmission line as an example, the surface electric field and the ground total electric field in different pole conductor arrangement schemes were calculated and analyzed, and the critical height of pole conductors for DC lines in residential and non-residential area were determined. Then, the corridor width of DC and AC lines at critical height in residential and non-residential areas before and after AC-DC line transformation were compared. The results indicate that for DC lines converted from common 500 kV double-circuit AC lines, the ground total electric field can meet the requirements of corresponding standard with appropriate pole conductor arrangement schemes.

运用Sawyer Tower电路测试薄膜铁电性能

声表面波煤矿瓦斯传感器是一种新型瓦斯传感器,PZT基高压电铁电薄膜是该类传感器制备的理想功能材料,铁电性作为PZT基铁电薄膜的另一个重要性能对传感器的工作特点和稳定性具有重要影响。因而,测试并掌握具有高压电性铁电薄膜的铁电性也是器件材料表征的一项重要工作。采用Sawyer Tower电路原理,自主设计铁电测试电路,制备PZT基铁电薄膜,并利用该电路测试薄膜的铁电性。由实验结果可知,自主设计的Sawyer Tower电路能简便、有效、准确和直观的测试薄膜的铁电性能,有望广泛应用于薄膜铁电性能测试及研究。

基于Kohonen网络的同杆双回线故障模式识别方法

对模式识别能力较强的Kohonen自组织神经网络及其在同杆双回线的故障模式识别方面的应用作了一些初步的讨论和研究 ,发现该网络能准确可靠识别发生在除母线附近外的双回线路上的所有故障模式 ,分析了线路两端故障模式误判的原因并提出了改进措施 ,指出了Kohonen网络应用于同杆双回线故障模式识别时的优点和局限性。

Bandwidth Design for CMOS Monolithic Photoreceiver

A monolithic photoreceiver which consists of a double photodiode (DPD) detector and a regulated cascade (RGC) transimpedance amplifier (TIA) is designed.The small signal circuit model of DPD is given and the bandwidth design method of a monolithic photoreceiver is presented.An important factor which limits the bandwidth of DPD detector and the photoreceiver is presented and analyzed in detail.A monolithic photoreceiver with 1.71GHz bandwidth and 49dB transimpedance gain is designed and simulated by applying a low-cost 0.6μm CMOS process and the test result is given.

基于Monte Carlo和EGM的同塔双回线路绕击跳闸率的计算

为准确评价输电线路的耐雷性能,采用蒙特卡罗法对雷电绕击线路的随机过程进行统计计算。针对同塔双回线路的实际杆塔结构,改进了电气几何模型(EGM)作为绕击判据,考虑输电线之间的相互屏蔽作用以及雷电先导入射角,通过先导位置落入绕击区间进行绕击的判定。选取220 kV同塔双回线路的实际杆塔进行绕击跳闸率的计算,与已有算法的计算结果进行对比分析,验证了改进算法的合理性,并分析了先导入射角,避雷线横担长度,地面倾角对绕击跳闸率的影响。

基于Hamilton原理的双柱悬索拉线塔塔柱参数共振分析

双柱悬索拉线塔在强风荷载作用下会出现动力失稳现象,准确评估它的动力稳定性对输电线路的安全性具有重要意义。先根据双柱悬索拉线塔塔柱的受力特点,将其简化为下端铰支、上端弹性支撑的等截面柱;接着运用Hamilton原理建立偏微分运动方程,并通过Galerkin方法将其分解为常微分方程,然后根据鲍洛金提供的方法建立临界频率方程,从而得到塔柱的主要动力不稳定域;最后从实际工程中选取双柱悬索拉线塔进行算例分析,结果表明此算例中的塔柱不存在参数共振现象。