Three-dimensional(3D) flower-like Co–Al layered double hydroxide(Co–Al-LDH) architectures composed of atomically thin nanosheets were successfully synthesized via a hydrothermal method in a mixed solvent of water an...Three-dimensional(3D) flower-like Co–Al layered double hydroxide(Co–Al-LDH) architectures composed of atomically thin nanosheets were successfully synthesized via a hydrothermal method in a mixed solvent of water and butyl alcohol. Owing to the unique hierarchical structure and modification by butyl alcohol, the electrochemical stability and the charge/mass transport of the Co–Al-LDHs was improved. When used in supercapacitors, the obtained Co–Al-LDHs deliver a high specific capacitance of 838 Fg^(-1) at a current density of 1 Ag^(-1)and excellent rate performance(753 Fg^(-1) at 30 Ag^(-1) and 677 Fg^(-1) at 100 Ag^(-1)), as well as excellent cycling stability with 95% retention of the initial capacitance even after 20,000 cycles at a current density of 5 Ag^(-1). This work provides a promising alternative strategy to enhance the electrochemical properties of supercapacitors.展开更多
Double buffering is an effective mechanism to hide the latency of data transfers between on-chip and off-chip memory. However, in dataflow architecture, the swapping of two buffers during the execution of many tiles d...Double buffering is an effective mechanism to hide the latency of data transfers between on-chip and off-chip memory. However, in dataflow architecture, the swapping of two buffers during the execution of many tiles decreases the performance because of repetitive filling and draining of the dataflow accelerator. In this work, we propose a non-stop double buffering mechanism for dataflow architecture. The proposed non-stop mechanism assigns tiles to the processing element array without stopping the execution of processing elements through optimizing control logic in dataflow architecture. Moreover, we propose a work-flow program to cooperate with the non-stop double buffering mechanism. After optimizations both on control logic and on work-flow program, the filling and draining of the array needs to be done only once across the execution of all tiles belonging to the same dataflow graph. Experimental results show that the proposed double buffering mechanism for dataftow architecture achieves a 16.2% average efficiency improvement over that without the optimization.展开更多
In the digital low level RF （LLRF） system of a circular （particle） accelerator, the RF field signal is usually down converted to a fixed intermediate frequency （IF）. The ratio of IF and sampling frequency determ...In the digital low level RF （LLRF） system of a circular （particle） accelerator, the RF field signal is usually down converted to a fixed intermediate frequency （IF）. The ratio of IF and sampling frequency determines the processing required, and differs in various LLRF systems. It is generally desirable to design a universally compatible architecture for different IFs with no change to the sampling frequency and algorithm. A new RF detection method based on a double heterodyne architecture for wide IF range has been developed, which achieves the high accuracy requirement of modern LLRF. In this paper, the relation of IF and phase error is systematically analyzed for the first time and verified by experiments. The effects of temperature drift for 16 h IF detection are inhibited by the amplitude and phase calibrations.展开更多
基金supported by the National Basic Research Program of China(2014CB239702)Research project of environmental protection in Jiangsu province(2016060)Science and Technology Commission of Shanghai Municipality(14DZ2250800)
文摘Three-dimensional(3D) flower-like Co–Al layered double hydroxide(Co–Al-LDH) architectures composed of atomically thin nanosheets were successfully synthesized via a hydrothermal method in a mixed solvent of water and butyl alcohol. Owing to the unique hierarchical structure and modification by butyl alcohol, the electrochemical stability and the charge/mass transport of the Co–Al-LDHs was improved. When used in supercapacitors, the obtained Co–Al-LDHs deliver a high specific capacitance of 838 Fg^(-1) at a current density of 1 Ag^(-1)and excellent rate performance(753 Fg^(-1) at 30 Ag^(-1) and 677 Fg^(-1) at 100 Ag^(-1)), as well as excellent cycling stability with 95% retention of the initial capacitance even after 20,000 cycles at a current density of 5 Ag^(-1). This work provides a promising alternative strategy to enhance the electrochemical properties of supercapacitors.
基金This work was supported by the National Key Research and Development Program of China under Grant No. 2016YFB0200501, the National Natural Science Foundation of China under Grant Nos. 61332009 and 61521092, the Open Project Program of State Key Laboratory of Mathematical Engineering and Advanced Computing under Grant No. 2016A04, and the Beijing Municipal Science and Technology Commission under Grant No. Z15010101009.
文摘Double buffering is an effective mechanism to hide the latency of data transfers between on-chip and off-chip memory. However, in dataflow architecture, the swapping of two buffers during the execution of many tiles decreases the performance because of repetitive filling and draining of the dataflow accelerator. In this work, we propose a non-stop double buffering mechanism for dataflow architecture. The proposed non-stop mechanism assigns tiles to the processing element array without stopping the execution of processing elements through optimizing control logic in dataflow architecture. Moreover, we propose a work-flow program to cooperate with the non-stop double buffering mechanism. After optimizations both on control logic and on work-flow program, the filling and draining of the array needs to be done only once across the execution of all tiles belonging to the same dataflow graph. Experimental results show that the proposed double buffering mechanism for dataftow architecture achieves a 16.2% average efficiency improvement over that without the optimization.
文摘In the digital low level RF （LLRF） system of a circular （particle） accelerator, the RF field signal is usually down converted to a fixed intermediate frequency （IF）. The ratio of IF and sampling frequency determines the processing required, and differs in various LLRF systems. It is generally desirable to design a universally compatible architecture for different IFs with no change to the sampling frequency and algorithm. A new RF detection method based on a double heterodyne architecture for wide IF range has been developed, which achieves the high accuracy requirement of modern LLRF. In this paper, the relation of IF and phase error is systematically analyzed for the first time and verified by experiments. The effects of temperature drift for 16 h IF detection are inhibited by the amplitude and phase calibrations.
