Numerical analysis of a double interlocking padded finger seal performance based on thermo-fluid-structure coupling method

Non-contacting finger seals represent an advanced non-contacting and compliant seal in gas turbine sealing technology.This paper proposes a new structure of noncontacting finger seals with double interlocking pads.The numerical analysis model based on the thermo-fluid-structure coupling method for the new type finger seal was established.The influence of working conditions on leakage of the seal was studied and compared with the single padded non-contacting finger seal.The results show that the interface between the bottom of the finger pad and rotor surface is the main leakage path that forms the gas film with obvious variations of pressure and flow velocity.Under high temperature and high pressure operating conditions,the hydrodynamic effect of the gas film is enhanced,and lifting force is significantly improved.The deformation of fingers is composed of elastic deformation and thermal deformation.At room temperature,the deformation of fingers is mainly elastic deformation and points to the center of the rotor,which reduces the gas film clearance.The deformation of fingers at high temperature and high pressure creates a circumferentially convergent gap between the bottom of the pad and the rotor,which is beneficial to improve the loading capacity and to reduce leakage of the seal.Compared with the typical single padded noncontacting finger seal,the double interlocking padded finger seal proposed in this paper reduces the leakage factor by about 37%,which provides an advanced seal concept with the potential to improve sealing performance under high temperature and high pressure working conditions.

Verification of SEU resistance in 65 nm high-performance SRAM with dual DICE interleaving and EDAC mitigation strategies

A dual double interlocked storage cell(DICE)interleaving layout static random-access memory(SRAM)is designed and manufactured based on 65 nm bulk complementary metal oxide semiconductor technology.The single event upset(SEU)cross sections of this memory are obtained via heavy ion irradiation with a linear energy transfer(LET)value ranging from 1.7 to 83.4 MeV/(mg/cm^(2)).Experimental results show that the upset threshold(LETth)of a 4 KB block is approximately 6 MeV/(mg/cm^(2)),which is much better than that of a standard unhardened SRAM with an identical technology node.A 1 KB block has a higher LETth of 25 MeV/(mg/cm^(2))owing to the use of the error detection and correction(EDAC)code.For a Ta ion irradiation test with the highest LET value(83.4 MeV/(mg/cm^(2))),the benefit of the EDAC code is reduced significantly because the multi-bit upset proportion in the SEU is increased remarkably.Compared with normal incident ions,the memory exhibits a higher SEU sensitivity in the tilt angle irradiation test.Moreover,the SEU cross section indicates a significant dependence on the data pattern.When comprehensively considering HSPICE simulation results and the sensitive area distributions of the DICE cell,it is shown that the data pattern dependence is primarily associated with the arrangement of sensitive transistor pairs in the layout.Finally,some suggestions are provided to further improve the radiation resistance of the memory.By implementing a particular design at the layout level,the SEU tolerance of the memory is improved significantly at a low area cost.Therefore,the designed 65 nm SRAM is suitable for electronic systems operating in serious radiation environments.