The accuracy of the measured current is a preeminent parameter for Current Control based Power Converter applications to ensure genuine operation of the designed converter.The current measurement accuracy can be affec...The accuracy of the measured current is a preeminent parameter for Current Control based Power Converter applications to ensure genuine operation of the designed converter.The current measurement accuracy can be affected by several parameters which includes the type of technology used,components used for the selected technology,aging,usage,operating and environmental conditions.The effect of gain resistors and their manufacturing tolerances on differential amplifier-based buck converter current measurement is investigated in this work.The analysis mainly focused on the output voltage variation and its accuracy with respect to the change in gain resistance tolerances.The gain resistors with 5%,1%,0.5%and 0.1%manufacturing tolerances taken for the worst-case analysis and the calculated performance results are compared and verified with the simula-tion results.The Operational amplifiers(Op-Amp)for high frequency power con-verter applications must operate in a high frequency noise environment and the intended current measuring system must manage common mode noise distur-bances paired with the signal to be measured.Based on the Common Mode Rejec-tion Ratio(CMRR)the common mode voltages and noise signals will effectively getfiltered out.Lesser CMRR results in lower common mode signal rejection,resulting in poor precision and noise rejection.In differential amplifiers,the CMRR predominantly depends on gain resistors.So,the variations in Common Mode Rejection Ratio due to gain resistor tolerances also analyzed and compared with the output voltage variations.Besides the effects of resistor tolerances,this paper also examines the effect of Op-Amp offset voltage on output accuracy spe-cifically for low magnitude input currents.The obtained results from this analysis clearly shows that the gain resistors with 0.1%tolerance gives maximum accuracy with improved CMRR and accuracy at low magnitude input currents will get well improved by using Op-Amps with Low Offset voltage specifications.展开更多
Based on the fact that the real inductor and the real capacitor are fractional order in nature and the fractional calculus,the transfer function modeling and analysis of the open-loop Buck converter in a continuous co...Based on the fact that the real inductor and the real capacitor are fractional order in nature and the fractional calculus,the transfer function modeling and analysis of the open-loop Buck converter in a continuous conduction mode（CCM） operation are carried out in this paper.The fractional order small signal model and the corresponding equivalent circuit of the open-loop Buck converter in a CCM operation are presented.The transfer functions from the input voltage to the output voltage,from the input voltage to the inductor current,from the duty cycle to the output voltage,from the duty cycle to the inductor current,and the output impedance of the open-loop Buck converter in CCM operation are derived,and their bode diagrams and step responses are calculated,respectively.It is found that all the derived fractional order transfer functions of the system are influenced by the fractional orders of the inductor and the capacitor.Finally,the realization of the fractional order inductor and the fractional order capacitor is designed,and the corresponding PSIM circuit simulation results of the open-loop Buck converter in CCM operation are given to confirm the correctness of the derivations and the theoretical analysis.展开更多
The dynamical behaviours of valley current controlled buck converter are studied by establishing its corresponding discrete iterative map model in this paper. Time-domain waveforms and phase portraits of valley curren...The dynamical behaviours of valley current controlled buck converter are studied by establishing its corresponding discrete iterative map model in this paper. Time-domain waveforms and phase portraits of valley current controlled buck converter are obtained by Runge-Kutta algorithm through a piecewise smooth switching model. The research results indicate that the valley current controlled buck converter exhibits rich nonlinear phenomena, and it has routes to chaos through period-doubling bifurcation and border-collision bifurcation in a wide parameter range. Interesting inverse nonlinear behaviours compared with peak current controlled buck converter are observed in the valley current controlled buck converter. Analysis and simulation results are verified by experimental results.展开更多
The discrete iterative map model of peak current-mode controlled buck converter with constant current load（CCL）,containing the output voltage feedback and ramp compensation, is established in this paper. Based on th...The discrete iterative map model of peak current-mode controlled buck converter with constant current load（CCL）,containing the output voltage feedback and ramp compensation, is established in this paper. Based on this model the complex dynamics of this converter is investigated by analyzing bifurcation diagrams and the Lyapunov exponent spectrum. The effects of ramp compensation and output voltage feedback on the stability of the converter are investigated. Experimental results verify the simulation and theoretical analysis. The stability boundary and chaos boundary are obtained under the theoretical conditions of period-doubling bifurcation and border collision. It is found that there are four operation regions in the peak current-mode controlled buck converter with CCL due to period-doubling bifurcation and border-collision bifurcation. Research results indicate that ramp compensation can extend the stable operation range and transfer the operating mode, and output voltage feedback can eventually eliminate the coexisting fast-slow scale instability.展开更多
Based on the mechanism for the generation of chaos in a buck converter, a pole placement method is proposed and applied to controlling the chaos in a circuit. The control circuit is designed and tested. Numerical calc...Based on the mechanism for the generation of chaos in a buck converter, a pole placement method is proposed and applied to controlling the chaos in a circuit. The control circuit is designed and tested. Numerical calculation and circuit implementation demonstrate the validity of this chaos control method.展开更多
This paper presents a simple and systematic approach to design second order sliding mode controller for buck converters.The second order sliding mode control(SOSMC)based on twisting algorithm has been implemented to c...This paper presents a simple and systematic approach to design second order sliding mode controller for buck converters.The second order sliding mode control(SOSMC)based on twisting algorithm has been implemented to control buck switch mode converter.The idea behind this strategy is to suppress chattering and maintain robustness and finite time convergence properties of the output voltage error to the equilibrium point under the load variations and parametric uncertainties.In addition,the influence of the twisting algorithm on the performance of closed-loop system is investigated and compared with other algorithms of first order sliding mode control such as adaptive sliding mode control(ASMC),nonsingular terminal sliding mode control(NTSMC).In comparative evaluation,the transient response of the output voltage with the step change in the load and the start-up response of the output voltage with the step change in the input voltage of buck converter were compared.Experimental results were obtained from a hardware setup constructed in laboratory.Finally,for all of the surveyed control methods,the theoretical considerations,numerical simulations,and experimental measurements from a laboratory prototype are compared for different operating points.It is shown that the proposed twisting method presents an improvement in steady state error and settling time of output voltage during load changes.展开更多
文摘The accuracy of the measured current is a preeminent parameter for Current Control based Power Converter applications to ensure genuine operation of the designed converter.The current measurement accuracy can be affected by several parameters which includes the type of technology used,components used for the selected technology,aging,usage,operating and environmental conditions.The effect of gain resistors and their manufacturing tolerances on differential amplifier-based buck converter current measurement is investigated in this work.The analysis mainly focused on the output voltage variation and its accuracy with respect to the change in gain resistance tolerances.The gain resistors with 5%,1%,0.5%and 0.1%manufacturing tolerances taken for the worst-case analysis and the calculated performance results are compared and verified with the simula-tion results.The Operational amplifiers(Op-Amp)for high frequency power con-verter applications must operate in a high frequency noise environment and the intended current measuring system must manage common mode noise distur-bances paired with the signal to be measured.Based on the Common Mode Rejec-tion Ratio(CMRR)the common mode voltages and noise signals will effectively getfiltered out.Lesser CMRR results in lower common mode signal rejection,resulting in poor precision and noise rejection.In differential amplifiers,the CMRR predominantly depends on gain resistors.So,the variations in Common Mode Rejection Ratio due to gain resistor tolerances also analyzed and compared with the output voltage variations.Besides the effects of resistor tolerances,this paper also examines the effect of Op-Amp offset voltage on output accuracy spe-cifically for low magnitude input currents.The obtained results from this analysis clearly shows that the gain resistors with 0.1%tolerance gives maximum accuracy with improved CMRR and accuracy at low magnitude input currents will get well improved by using Op-Amps with Low Offset voltage specifications.
基金Project supported by the National Natural Science Foundation of China (Grant No. 51007068)the Specialized Research Fund for the Doctoral Program of Higher Education of China (Grant No. 20100201120028)+2 种基金the Natural Science Basic Research Plan in Shaanxi Province of China (Grant No. 2012JQ7026)the Fundamental Research Funds for the Central Universities of China (Grant No. 2012jdgz09)the State Key Laboratory of Electrical Insulation and Power Equipment of China (Grant No. EIPE12303)
文摘Based on the fact that the real inductor and the real capacitor are fractional order in nature and the fractional calculus,the transfer function modeling and analysis of the open-loop Buck converter in a continuous conduction mode（CCM） operation are carried out in this paper.The fractional order small signal model and the corresponding equivalent circuit of the open-loop Buck converter in a CCM operation are presented.The transfer functions from the input voltage to the output voltage,from the input voltage to the inductor current,from the duty cycle to the output voltage,from the duty cycle to the inductor current,and the output impedance of the open-loop Buck converter in CCM operation are derived,and their bode diagrams and step responses are calculated,respectively.It is found that all the derived fractional order transfer functions of the system are influenced by the fractional orders of the inductor and the capacitor.Finally,the realization of the fractional order inductor and the fractional order capacitor is designed,and the corresponding PSIM circuit simulation results of the open-loop Buck converter in CCM operation are given to confirm the correctness of the derivations and the theoretical analysis.
基金Project supported by the National Natural Science Foundation of China (Grant No. 50677056)the Doctoral Innovation Foundation of Southwest Jiaotong University of China+1 种基金the Cultivation Project of Excellent Doctorate Dissertation of Southwest Jiaotong University of Chinathe Natural Science Foundations of Jiangsu Province,China (Grant No. BK2009105)
文摘The dynamical behaviours of valley current controlled buck converter are studied by establishing its corresponding discrete iterative map model in this paper. Time-domain waveforms and phase portraits of valley current controlled buck converter are obtained by Runge-Kutta algorithm through a piecewise smooth switching model. The research results indicate that the valley current controlled buck converter exhibits rich nonlinear phenomena, and it has routes to chaos through period-doubling bifurcation and border-collision bifurcation in a wide parameter range. Interesting inverse nonlinear behaviours compared with peak current controlled buck converter are observed in the valley current controlled buck converter. Analysis and simulation results are verified by experimental results.
基金Project supported by the National Natural Science Foundation of China(Grant No.61371033)the Fok Ying-Tung Education Foundation for Young Teachers in the Higher Education Institutions of China(Grant No.142027)+1 种基金the Sichuan Provincial Youth Science and Technology Fund,China(Grant Nos.2014JQ0015and 2013JQ0033)the Fundamental Research Funds for the Central Universities,China(Grant No.SWJTU11CX029)
文摘The discrete iterative map model of peak current-mode controlled buck converter with constant current load（CCL）,containing the output voltage feedback and ramp compensation, is established in this paper. Based on this model the complex dynamics of this converter is investigated by analyzing bifurcation diagrams and the Lyapunov exponent spectrum. The effects of ramp compensation and output voltage feedback on the stability of the converter are investigated. Experimental results verify the simulation and theoretical analysis. The stability boundary and chaos boundary are obtained under the theoretical conditions of period-doubling bifurcation and border collision. It is found that there are four operation regions in the peak current-mode controlled buck converter with CCL due to period-doubling bifurcation and border-collision bifurcation. Research results indicate that ramp compensation can extend the stable operation range and transfer the operating mode, and output voltage feedback can eventually eliminate the coexisting fast-slow scale instability.
基金Project supported by the National Natural Science Foundation of China （Grant Nos 10247005 and 70571017）, the Guangxi New Century Foundation for Ten, Hundred and Thousand Talents （Grant No 2002226）.
文摘Based on the mechanism for the generation of chaos in a buck converter, a pole placement method is proposed and applied to controlling the chaos in a circuit. The control circuit is designed and tested. Numerical calculation and circuit implementation demonstrate the validity of this chaos control method.
文摘This paper presents a simple and systematic approach to design second order sliding mode controller for buck converters.The second order sliding mode control(SOSMC)based on twisting algorithm has been implemented to control buck switch mode converter.The idea behind this strategy is to suppress chattering and maintain robustness and finite time convergence properties of the output voltage error to the equilibrium point under the load variations and parametric uncertainties.In addition,the influence of the twisting algorithm on the performance of closed-loop system is investigated and compared with other algorithms of first order sliding mode control such as adaptive sliding mode control(ASMC),nonsingular terminal sliding mode control(NTSMC).In comparative evaluation,the transient response of the output voltage with the step change in the load and the start-up response of the output voltage with the step change in the input voltage of buck converter were compared.Experimental results were obtained from a hardware setup constructed in laboratory.Finally,for all of the surveyed control methods,the theoretical considerations,numerical simulations,and experimental measurements from a laboratory prototype are compared for different operating points.It is shown that the proposed twisting method presents an improvement in steady state error and settling time of output voltage during load changes.
