A FAULT DETECTION SENSOR FOR CIRCUIT AGING USING DOUBLE-EDGE-TRIGGERED FLIP-FLOP

In nanoscale technology, transistor aging is one of the most critical problems that impact on the reliability of circuits. Aging sensor is a good online way to detect the circuit aging, which performs during the operating time with no influence of the normal operation of circuits. In this paper, a Dou- ble-edge-triggered Detection Sensor for circuit Aging （DSDA） is proposed, which employs data signal of logic circuits as its clock to control the sampling process. The simulation is done by Hspice using 45 nm technology. The results show that this technique is not case of the detection precision is more than 80% under aging fault effectively with the 8% power cost and 30% sensitive to the process variations. The worst the different process variations. It can detect performance cost.

Low power and high speed explicit-pulsed double-edge triggered level converting flip-flop

Variable supply voltage-clustered voltage scaling （VS-CVS） scheme can be very effective in reducing power consumption of CMOS circuits without degrading system performance. Level converting flip-flops （LCFFs） are key elements in the CVS scheme. In this paper, a new explicit-pulsed double-edge triggered level converting flip-flop （nEP-DET-LCFF） is proposed, which employs double-edge triggering technique, dynamic structure, explicit pulse generator, conditional discharge technique and proper arrangement of stacked nMOS transistors to efficiently perform latching and level converting functions simultaneously. The proposed nEP-DET-LCFF combines merits of both conventional explicit-LCFFs and implicit-LCFFs. Simulation shows the proposed nEP-DET-LCFF has improvement of 19.2% -46% in delay, and 19.4% - 52.9% in power-delay product （PDP） as compared with the published LCFFs.

Structure and design method for pulse-triggered flip-flops at switch level

A kind of structure and a design method using transmission voltage-switch theory for pulse-triggered flip-flops were proposed,which are suitable for all kinds of pulse-triggered flip-flops and no extra techniques are needed to eliminate the switching activities of internal nodes.Based on the proposed structure and design technique,two pulsed flip-flops were implemented and simulated.The proposed pulsed flip-flops have simple circuit structures.HSPICE simulation shows that the proposed pulsed D flip-flop outperforms the conventional pulsed D flip-flop by 17.2% in delay and 30.1% in power-delay-product(PDP) and the proposed pulsed JK flip-flop has low power and small PDP compared with pulsed D pulsed flip-flops,confirming that the proposed structure and design technique are simple and practical.

DESIGN OF nMOS QUATERNARY FLIP-FLOPS AND THEIR APPLICATIONS

By using the theory of clipping voltage-switches, two kinds of master/slave nMOS quaternary flip-flops are designed. These flip-flops have the capability of two-input presetting and double-rail complementary outputs. It is shown that these flip-flops are effectively suitable to design nMOS quaternary sequential circuits by designing two examples of hexadecimal up-counter and decimal up-counter.

DESIGN OF TERNARY FLIP-FLOPS AND SEQUENTIAL CIRCUITS BASED UPON U_h GATE

According to the next-state equations of various ternary flip-flops(tri-flop),whichare based upon ternary modular algebra,various ternary flip-flops are implemented by usinguniversal-logic-modules,U_hs.Based on it,ternary sequential circuits are implemented by usingarray of universal-logic-modules,U_hs.

An Overview of Non-Volatile Flip-Flops Based on Emerging Memory Technologies(Invited paper)

Low power consumption is a major issue in nowadays electronics systems. This trend is pushed by the development of data center related to cloud services and soon to the Internet of Things （IoT） deployment. Memories are one of the major contributors to power consumption. However, the development of emerging memory technologies paves the way to low-power design, through the partial replacement of the dynamic random access memory （DRAM） with the non-volatile stand-alone memory in servers or with the embedded or distributed emerging non-volatile memory in IoT objects. In the latter case, non-volatile flip-flops （NVFFs） seem a promising candidate to replace the retention latch. Indeed, IoT objects present long sleep time and NVFFs offer to save data in registers with zero power when the application is idle. This paper gives an overview of NVFF architecture flavors for various emerging memory technologies.

Beware of the Double-Edged Sword of Populism

Populism in Western democracies is on the rise.What was once conf ined to outliers and extreme political parties is now tearing away into the whole political system.Inflammatory speeches and critics of so-called'fake news'made by

Double-edged sword-Challenges and opportunities

In this Shi Jiazhuang Royal King Apparel Group fashion show and franchise recruitment event, Liu Lianhong, president of the association of clothing industry trade of Hebei province made his presence and delivered a key speech involving the status quo of Hebei garment industry, opportunities and challenges it faces, practical solutions and expectation as well, which impressed all the present a lot. After the event l had a face to face interview with him:

An Improved Power Efficient Clock Pulsed D Flip-flop Using Transmission Gate

Recent digital applications will require highly efficient and high-speed gadgets and it is related to the minimum delay and power consumption.The proposed work deals with a low-power clock pulsed data flip-flop(D flip-flop)using a transmission gate.To accomplish a power-efficient pulsed D flip-flop,clock gating is proposed.The gated clock reduces the unnecessary switching of the transistors in the circuit and thus reduces the dynamic power consumption.The clock gating approach is employed by using an AND gate to disrupt the clock input to the circuit as per the control signal called Enable.Due to this process,the clock gets turned off to reduce power consumption when there is no change in the output.The proposed transmission gate-based pulsed D flip-flop’s performance with clock gating and without clock gating circuit is analyzed.The proposed pulsed D flip-flop power consumption is 1.586μw less than the without clock gated flip-flop.Also,the authors have designed a 3-bit serial-in and parallel-out shift register using the proposed D flip-flop and analyzed the performance.Tanner Electronic Design Automation tool is used to simulate all the circuits with 45 nm technology.

多种模式降水预报的稳定性特征研究

预报的稳定性是指对同一时段在不同时间发布的多时效预报结论的一致性,是模式预报质量的一个重要方面,较大的不稳定性会给使用者造成困扰。为深入了解业务常用模式的稳定性,使用相对标准偏差指标计算不同时效预报的降水量波动大小,并改进了Flip-Flop指数(改进后简称FF_(norm)),计算多时效降水量预报变化趋势的翻转程度,衡量预报变化趋势的稳定性,对2种全球模式(ECMWF、NCEP-GFS)、3种区域模式(CMA-MESO、CMA-SH9、HHUPS-ST),在中国6个气候分区中降水预报的稳定性进行对比分析,分为实况有降水和暴雨及以上降水2种情况进行了讨论。结果表明:实况有降水时,相对区域模式来说,全球模式的多时效降水预报的相对标准偏差较小,即模式降水量预报的波动较小;各模式对西南区的西部、东北区的东部以及华南区的南部预报的波动性相对较小,西北区的西部波动性较大。就多时效降水量预报变化趋势而言,2种情况下均为CMA-MESO、NCEP-GFS和ECMWF的稳定性较好,其FF_(norm)指数小于HHUPS-ST和CMA-SH9模式,其中CMA-MESO对西南区、华南部分地区降水量预报变化趋势的稳定性较为突出;CMA-SH9的指数最大,多时效降水量预报变化趋势稳定性较差;各模式对长江中下游地区的FF norm指数相对较大,多时效预报趋势的稳定性较差。有降水时,CMA-MESO随时效临近的降水量预报变化趋势稳定(单调递增、单调递减或不变)的频次最多,其次是NCEP-GFS,2种降水情况下,该2种模式的降水量预报均为随时效临近单调递增次数大于递减次数,且CMA-MESO单调递增特征尤其显著。以上特征能够为模式调试和预报决策提供参考。

On Switching of a Flip-Flop Jet Nozzle with Double Ports by Single-Port Control

This research deals with the oscillation mechanism of a flip-flop jet nozzle with a connecting tube, based on the measurements of pressures and velocities in the connecting tube and inside the nozzle. The measurements are carried out varying: 1) the inside diameter d of the connecting tube;2) the length L of the connecting tube and 3) the jet velocity VPN from a primary-nozzle exit. We assume that the jet switches when a time integral reaches a certain value. At first, as the time integral, we introduce the accumulated flow work of pressure, namely, the time integral of mass flux through a connecting tube into the jet-reattaching wall from the opposite jet-un-reattaching wall. Under the assumption, the trace of pressure difference between both the ends of the connecting tube is simply modeled on the basis of measurements, and the flow velocity in the connecting tube is computed as incompressible flow. Second, in order to discuss the physics of the accumulated flow work further, we conduct another experiment in single-port control where the inflow from the control port on the jet-reattaching wall is forcibly controlled and the other control port on the opposite jet-un-reattaching wall is sealed, instead of the experiment in regular jet’s oscillation using the ordinary nozzle with two control ports in connection. As a result, it is found that the accumulated flow work is adequate to determine the dominant jet- oscillation frequency. In the experiment in single-port control, the accumulated flow work of the inflow until the jet’s switching well agrees with that in regular jet’s oscillation using the ordinary nozzle.

RESEARCH INTO TERNARY EDGE-TRIGGERED JKL FLIP-FLOP

The design of ternary edge-triggered JKL-type flip-flop is proposed.The computersimulation and the test in experimental circuit made up with TTL gate show this flip-flop has theexpected logic functions.

Flip-Flop Flow Control inside Streamwise Diverging Diamond-Shaped Cylinder Bundles with Concavities

The flow visualization work with the aid of PIV and Piezometer deals with flip-flop flow around diamond-shaped cylinder bundle revised with concavities on both bundle walls. It is disclosed that 1) the concavity constructed on both side-walls of a diamond cylinder induces a substantial change in the flow patterns in the exit jet-stream field and jet- stream dispersion, 2) pressure characteristics are quantitatively measured in a diverging-flow region in diamond cylinder bundles with concavityand in its downstream region, and 3) flip-flop flow occurs in the flow passages and its occurrence condition is obtained.

Numerical Simulation of an All Optical Flip-Flop Based on a Nonlinear Distributed Bragg Reflector Laser Structure

A new design for an all optical flip flop is introduced. It is based on a nonlinear Distributed Bragg Reflector (DBR) semiconductor laser structure. The device does not require a holding beam. An optical gain medium confined between 2 Bragg reflectors forms the device. One of the Bragg reflectors is detuned from the other by making its average refractive index slightly higher, and it has a negative nonlinear coefficient that is due to direct absorption at Urbach tail. At low light intensity in the structure, the detuned Bragg reflector does not provide optical feedback to start a laser mode. An optical pulse injected to the structure reduces the detuning of the nonlinear Bragg reflector and a laser mode builds up. The device is reset by detuning the second Bragg reflector optically by an optical pulse that generates electron-hole pairs by direct absorption. A mathematical model of the device is introduced. The model is solved numerically in time domain using a general purpose graphics processing unit (GPGPU) to increase accuracy and to reduce the computation time. The switching dynamics of the device are in nanosecond time scale. The device could be used for all optical data packet switching/routing.

An Improved Design for an All-Optical Flip-Flop Based on a Nonlinear 3-Sections DFB Laser Cavity

A new all optical flip-flop based on a 3-sections nonlinear semiconductor DFB laser structure is proposed and simulated. The operation of the device does not require a holding beam. Electrical current injection into an active layer provides optical gain to the laser mode. The wave-guiding layer consists of a linear grating section centered between 2 detuned nonlinear grating sections. The average refractive index in the nonlinear sections is slightly higher than the refractive index of the middle section. A negative nonlinear refractive index coefficient exists along the nonlinear sections. In the “OFF” state, the DFB structure does not provide enough optical feedback to lase due to the detuned sections. At high light intensity in structure, “ON” state, detuning decreases and the DFB structure allows for a laser mode that sustains the decrease in detuning to exist. The nonlinearity is provided by direct photon absorption at the Urbach tail. Numerical simulations using GPGPU computing show nanoseconds transition times between “OFF” and “ON” states.

Simulations of a Novel All-Optical Flip-Flop Based on a Nonlinear DFB Laser Cavity Using GPGPU Computing

A new all-optical flip-flop based on a nonlinear Distributed feedback (DFB) structure is proposed. The device does not require a holding beam. A nonlinear part of the grating is detuned from the remaining part of the grating and has negative nonlinear coefficient. Optical gain is provided by an injected electrical current into an active layer. In the OFF state, due to the detuned section, no laser light is generated in the device. An injected optical pulse reduces the detuning of the nonlinear section, and the optical feedback provided by the DFB structure generates a laser light in the structure that sustains the change in the detuned section. The device is switched “OFF” by detuning another section of the grating by a Reset pulse. The Reset pulse reduces the refractive index of that section by the generation of electron-hole pairs. The Reset pulse wavelength is adjusted such that the optical gain provided by the active layer at that wavelength is zero. The Reset pulse is prevented from reaching the nonlinear detuned section by introducing an optical absorber in the laser cavity to attenuate the pulse. The device is simulated in time domain using General Purpose Graphics Processing Unit (GPGPU) computing. Set-Reset operations are in nanosecond time scale.

Brillouin scattering spectrum for liquid detection and applications in oceanography

The Brillouin scattering spectrum has been used to investigate the properties of a liquid medium.Here,we propose an improved method based on the double-edge technique to obtain the Brillouin spectrum of a liquid.We calculated the transmission ratios and deduced the Brillouin shift and linewidth to construct the Brillouin spectrum by extracting the Brillouin edge signal through filtered double-edge data.We built a detection system to test the performance of this method and measured the Brillouin spectrum for distilled water at different temperatures and compared it with the theoretical prediction.The observed difference between the experimental and theoretical values for Brillouin shift and linewidth is less than 4.3 MHz and 3.2 MHz,respectively.Moreover,based on the double-edge technique,the accuracy of the extracted temperatures and salinity is approximately 0.1°C and 0.5‰,respectively,indicating significant potential for application in water detection and oceanography.

Anti-Interference Low-Power Double-Edge Triggered Flip-Flop Based on C-Elements

When the input signal has been interfered and glitches occur,the power consumption of Double-Edge Triggered Flip-Flops(DETFFs)will significantly increase.To effectively reduce the power consumption,this paper presents an anti-interference low-power DETFF based on C-elements.The improved C-element is used in this DETFF,which effectively blocks the glitches in the input signal,prevents redundant transitions inside the DETFF,and reduces the charge and discharge frequencies of the transistor.The C-element has also added pull-up and pull-down paths,reducing its latency.Compared with other existing DETFFs,the DETFF proposed in this paper only flips once on the clock edge,which greatly reduces the redundant transitions caused by glitches and effectively reduces power consumption.This paper uses HSPICE to simulate the proposed DETFF and other 10 DETFFs.The findings show that compared with the other 10 types of DETFFs,the proposed DETFF has achieved large performance indexes in the total power consumption,total power consumption with glitches,delays,and power delay product.A detailed analysis of variance indicates that the proposed DETFF features less sensitivity to process,voltage,temperature,and Negative Bias Temperature Instability(NBTI)-induced aging variations.

Double-edged effects caused by magnesium ions and alkaline environment regulate bioactivities of magnesium-incorporated silicocarnotite in vitro

Magnesium(Mg)is an important element for its enhanced osteogenic and angiogenic properties in vitro and in vivo,however,the inherent alkalinity is the adverse factor that needs further attention.In order to study the role of alkalinity in regulating osteogenesis and angiogenesis in vitro,magnesium-silicocarnotite[Mg-Ca5(PO4)2SiO4,Mg-CPS]was designed and fabricated.In this study,Mg-CPS showed better osteogenic and angiogenic properties than CPS within 10wt.%magnesium oxide(MgO),since the adversity of alkaline condition was covered by the benefits of improved Mg ion concentrations through activating Smad2/3-Runx2 signaling pathway in MC3T3-E1 cells and PI3K-AKT signaling pathway in human umbilical vein endothelial cells in vitro.Besides,provided that MgO was incorporated with 15wt.%in CPS,the bioactivities had declined due to the environment consisting of higher-concentrated Mg ions,stronger alkalinity and lower Ca/P/Si ions caused.According to the results,it indicated that bioactivities of Mg-CPS in vitro were regulated by the double-edged effects,which were the consequence of Mg ions and alkaline environment combined.Therefore,if MgO is properly incorporated in CPS,the improved bioactivities could cover alkaline adversity,making Mg-CPS bioceramics promising in orthopedic clinical application for its enhancement of osteogenesis and angiogenesis in vitro.