This paper presents a high linearity downconverter implemented in a 0.18μm CMOS process for long term evolution（LTE） receivers without a surface acoustic wave（SAW） filter.The proposed downconverter is composed of...This paper presents a high linearity downconverter implemented in a 0.18μm CMOS process for long term evolution（LTE） receivers without a surface acoustic wave（SAW） filter.The proposed downconverter is composed of a transconductance（Gm） stage,a passive mixer,a current buffer,a transimpedance（TIA） stage,and a DC-offset cancellation（DCOC） loop.The current buffer is utilized to provide very low load impedance for the passive mixer at high frequencies and reduce the output voltage swing induced by out-of-band blockers.This technique improves the input referred third-order intercept point（IIP3） and second-order intercept point（IIP2） of the down-converter by 4.5 dB and 11 dB,respectively.The measured results show that the proposed downconverter achieves a voltage conversion gain of 29.5 dB,double sideband noise figure of 12.7 dB,out-of-band IIP3 of 13 dBm and IIP2 of more than 62 dBm.展开更多
Quantum dots are finding increasing commercial success in LED applications.While they have been used for several years in remote off-chip architectures for display applications,it is shown for the first time to our kn...Quantum dots are finding increasing commercial success in LED applications.While they have been used for several years in remote off-chip architectures for display applications,it is shown for the first time to our knowledge that quantum dots can withstand the demands of the on-chip architecture and therefore are capable of being used as a direct phosphor replacement in both lighting and display applications.It is well known that,to achieve improved color metrics in lighting as well as increased gamut in display technologies,it is highly desirable to utilize a downconverter with a narrow emission linewidth as well as a precisely tunable peak.This paper will discuss the results of on-chip use of quantum dots in a lighting product,and explore the opportunities and practical limits for improvement of various lighting and display metrics by use of this unique downconverter technology.展开更多
Modern low-level RF （LLRF） control systems of particle accelerators are designed to achieve extremely precise field amplitude and phase regulation inside the accelerating cavities. The RF field signal is usually con...Modern low-level RF （LLRF） control systems of particle accelerators are designed to achieve extremely precise field amplitude and phase regulation inside the accelerating cavities. The RF field signal is usually converted to an intermediate frequency （IF） before being sampled by ADC. As the down-conversion is an important procedure of digital signal processing in LLRF system, designing a high performance and broad band downconverter compatible with various accelerators is important. In this paper, the design of a downconverter based on MicroTCA and its performance evaluation on different frequency points are presented. The major design objective of this module is a wider operating frequency range and more flexibility in application.展开更多
An integrated downconverter with high linearity for digital broadcasting system receivers is implemented in a 0.13 m CMOS process with an active area of 0.1 mm2. The current-mode scheme is adopted to improve linearity...An integrated downconverter with high linearity for digital broadcasting system receivers is implemented in a 0.13 m CMOS process with an active area of 0.1 mm2. The current-mode scheme is adopted to improve linearity performance by avoiding voltage fluctuation. A passive CMOS switching pair is utilized to improve the even-order linearity of the downconverter. A current amplifier is used to provide low input impedance which will easily lead to a wide operating bandwidth and high linearity. Moreover, a current-mode Sallen-Key low-pass filter is adopted for effective rejection of out-of-band interferers and also low input impedance. The digital-assisted DC offset calibration improves the second-order distortion of the downconverter. This design achieves a maximum gain of 40 dB and a dynamic range of 10 dB. Measured noise figure is 8.2 dB, an IIP2 of 63 dBm, an IIP3 of 17 dBm at the minimum gain of 30 dB. The downconverter consumes about 7.7 m A under a supply of 1.2 V.展开更多
针对多通道通信雷达系统中下变频器件功能单一及幅相校准电路实现复杂的问题,采用多模式全流水线坐标旋转数字计算机设计了一种改进的全数字下变频电路。改进的设计在输入端利用其旋转模式实现数字下变频功能,在基带端利用其向量模式计...针对多通道通信雷达系统中下变频器件功能单一及幅相校准电路实现复杂的问题,采用多模式全流水线坐标旋转数字计算机设计了一种改进的全数字下变频电路。改进的设计在输入端利用其旋转模式实现数字下变频功能,在基带端利用其向量模式计算通道幅相误差并形成反馈补偿,具有精简的硬件系统结构。闭环实验结果表面,系统自校准后的基带幅度误差控制在0.08 d B内,相位误差控制在0.15°内,进一步验证了提出方法的可行性和正确性。展开更多
基金supported by the National High Technology Research and Development Program of China(No.2009AA011608)the National Major Science and Technology Projects Program of China(No.2009ZX03002-004-02)
文摘This paper presents a high linearity downconverter implemented in a 0.18μm CMOS process for long term evolution（LTE） receivers without a surface acoustic wave（SAW） filter.The proposed downconverter is composed of a transconductance（Gm） stage,a passive mixer,a current buffer,a transimpedance（TIA） stage,and a DC-offset cancellation（DCOC） loop.The current buffer is utilized to provide very low load impedance for the passive mixer at high frequencies and reduce the output voltage swing induced by out-of-band blockers.This technique improves the input referred third-order intercept point（IIP3） and second-order intercept point（IIP2） of the down-converter by 4.5 dB and 11 dB,respectively.The measured results show that the proposed downconverter achieves a voltage conversion gain of 29.5 dB,double sideband noise figure of 12.7 dB,out-of-band IIP3 of 13 dBm and IIP2 of more than 62 dBm.
文摘Quantum dots are finding increasing commercial success in LED applications.While they have been used for several years in remote off-chip architectures for display applications,it is shown for the first time to our knowledge that quantum dots can withstand the demands of the on-chip architecture and therefore are capable of being used as a direct phosphor replacement in both lighting and display applications.It is well known that,to achieve improved color metrics in lighting as well as increased gamut in display technologies,it is highly desirable to utilize a downconverter with a narrow emission linewidth as well as a precisely tunable peak.This paper will discuss the results of on-chip use of quantum dots in a lighting product,and explore the opportunities and practical limits for improvement of various lighting and display metrics by use of this unique downconverter technology.
文摘Modern low-level RF （LLRF） control systems of particle accelerators are designed to achieve extremely precise field amplitude and phase regulation inside the accelerating cavities. The RF field signal is usually converted to an intermediate frequency （IF） before being sampled by ADC. As the down-conversion is an important procedure of digital signal processing in LLRF system, designing a high performance and broad band downconverter compatible with various accelerators is important. In this paper, the design of a downconverter based on MicroTCA and its performance evaluation on different frequency points are presented. The major design objective of this module is a wider operating frequency range and more flexibility in application.
基金supported by the Science and Technology Innovation Project for the Postgraduates of National University of Defense Technology
文摘An integrated downconverter with high linearity for digital broadcasting system receivers is implemented in a 0.13 m CMOS process with an active area of 0.1 mm2. The current-mode scheme is adopted to improve linearity performance by avoiding voltage fluctuation. A passive CMOS switching pair is utilized to improve the even-order linearity of the downconverter. A current amplifier is used to provide low input impedance which will easily lead to a wide operating bandwidth and high linearity. Moreover, a current-mode Sallen-Key low-pass filter is adopted for effective rejection of out-of-band interferers and also low input impedance. The digital-assisted DC offset calibration improves the second-order distortion of the downconverter. This design achieves a maximum gain of 40 dB and a dynamic range of 10 dB. Measured noise figure is 8.2 dB, an IIP2 of 63 dBm, an IIP3 of 17 dBm at the minimum gain of 30 dB. The downconverter consumes about 7.7 m A under a supply of 1.2 V.
文摘针对多通道通信雷达系统中下变频器件功能单一及幅相校准电路实现复杂的问题,采用多模式全流水线坐标旋转数字计算机设计了一种改进的全数字下变频电路。改进的设计在输入端利用其旋转模式实现数字下变频功能,在基带端利用其向量模式计算通道幅相误差并形成反馈补偿,具有精简的硬件系统结构。闭环实验结果表面,系统自校准后的基带幅度误差控制在0.08 d B内,相位误差控制在0.15°内,进一步验证了提出方法的可行性和正确性。
