A novel divider based on dual-bit algorithm and its VLSI implementation are presented.Compared with the divider of MIPS microprocessor,it decreases the average executing cycles by 52.5% while its maximum delay is almo...A novel divider based on dual-bit algorithm and its VLSI implementation are presented.Compared with the divider of MIPS microprocessor,it decreases the average executing cycles by 52.5% while its maximum delay is almost the same and its transistor count increases by 60%.Furthermore,the simulation result indicates that the power consumption decreases to 11.3% with the same processing ability.展开更多
呈现了一种基于CMOS开关的单比特双极化可重构智能超表面系统。该超表面单元只需两个CMOS开关器件即可实现双极化的控制;超表面单元采用总分总的控制结构,在保证极化隔离度的情况下实现双极化同控;通过引入双层拉远交直流隔离技术,有效...呈现了一种基于CMOS开关的单比特双极化可重构智能超表面系统。该超表面单元只需两个CMOS开关器件即可实现双极化的控制;超表面单元采用总分总的控制结构,在保证极化隔离度的情况下实现双极化同控;通过引入双层拉远交直流隔离技术,有效地解决了交直流之间的串扰问题,配合一体分离的控制方案,可以将偏压控制点放置在辐射单元的任意位置;通过在单元周围加载基片集成腔体以及在腔体中加载短路抑制柱的方式有效抑制了表面波,极大地提升了扫描角度。仿真结果表明,超表面单元的相位差在26~28 GHz的范围内都能保持180±35度的相差,开和关状态的平均插损在1 d B以内;暗室测试结果表明超表面系统在±60°的扫描范围内均工作良好,波束形态清晰,旁瓣低于15 d B;外场测试结果显示该系统能够提升盲区增益25 d B以上,使系统流量达到满流。展开更多
文摘A novel divider based on dual-bit algorithm and its VLSI implementation are presented.Compared with the divider of MIPS microprocessor,it decreases the average executing cycles by 52.5% while its maximum delay is almost the same and its transistor count increases by 60%.Furthermore,the simulation result indicates that the power consumption decreases to 11.3% with the same processing ability.
文摘呈现了一种基于CMOS开关的单比特双极化可重构智能超表面系统。该超表面单元只需两个CMOS开关器件即可实现双极化的控制;超表面单元采用总分总的控制结构,在保证极化隔离度的情况下实现双极化同控;通过引入双层拉远交直流隔离技术,有效地解决了交直流之间的串扰问题,配合一体分离的控制方案,可以将偏压控制点放置在辐射单元的任意位置;通过在单元周围加载基片集成腔体以及在腔体中加载短路抑制柱的方式有效抑制了表面波,极大地提升了扫描角度。仿真结果表明,超表面单元的相位差在26~28 GHz的范围内都能保持180±35度的相差,开和关状态的平均插损在1 d B以内;暗室测试结果表明超表面系统在±60°的扫描范围内均工作良好,波束形态清晰,旁瓣低于15 d B;外场测试结果显示该系统能够提升盲区增益25 d B以上,使系统流量达到满流。
