A frequency servo SoC with output power stabilization loop technology for miniaturized atomic clocks

A frequency servo system-on-chip(FS-SoC)featuring output power stabilization technology is introduced in this study for high-precision and miniaturized cesium(Cs)atomic clocks.The proposed power stabilization loop(PSL)technique,incorporating an off-chip power detector(PD),ensures that the output power of the FS-SoC remains stable,mitigating the impact of power fluctuations on the atomic clock's stability.Additionally,a one-pulse-per-second(1PPS)is employed to syn-chronize the clock with GPS.Fabricated using 65 nm CMOS technology,the measured phase noise of the FS-SoC stands at-69.5 dBc/Hz@100 Hz offset and-83.9 dBc/Hz@1 kHz offset,accompanied by a power dissipation of 19.7 mW.The Cs atomic clock employing the proposed FS-SoC and PSL obtains an Allan deviation of 1.7×10^(-11) with 1-s averaging time.

Sensing-Communication-Computing-Control Closed Loop for NOMA-UAV Systems

In the areas without terrestrial communication infrastructures,unmanned aerial vehicles(UAVs)can be utilized to serve field robots for mission-critical tasks.For this purpose,UAVs can be equipped with sensing,communication,and computing modules to support various requirements of robots.In the task process,different modules assist the robots to perform tasks in a closed-loop way,which is referred to as a sensing-communication-computing-control(SC3)loop.In this work,we investigate a UAV-aided system containing multiple SC^(3)loops,which leverages non-orthogonal multiple access(NOMA)for efficient resource sharing.We describe and compare three different modelling levels for the SC^(3)loop.Based on the entropy SC^(3)loop model,a sum linear quadratic regulator(LQR)control cost minimization problem is formulated by optimizing the communication power.Further for the assure-to-be-stable case,we show that the original problem can be approximated by a modified user fairness problem,and accordingly gain more insights into the optimal solutions.Simulation results demonstrate the performance gain of using NOMA in such task-oriented systems,as well as the superiority of our proposed closed-loop-oriented design.

A new type of Wilkinson dual-frequency power divider with symmetrical transmission line stubs

To realize equal power splitting at two arbitrary gigahertz-frequencies, this paper presents a new type of Wilkinson dual frequency power divider, consisting of three-section transmission lines and a series RLC(resistor, inductor and capacitor)circuit. By equating the [ABCD] matrix of the proposed circuit to that of the quarter-wave impedance transformer, coupled with even/odd mode analyses, the design equations of the proposed network are derived. For verification, two dual-frequency power dividers with dual-band operating frequencies at 0.6 GHz and 3.0 GHz, and 3.8 GHz and 10 GHz respectively are designed and simulated. Simulation results show that the dual-band ratio of the proposed power divider can be as large as 5. Comparisons of the simulation results at X-band and S-band with different power dividers indicate that the proposed dual-band power divider performs better under the scenario of the upper operating frequency extending to X-band.

An Augmented Jacobian Method for Power Flow Analysis of Weakly Looped Distribution Systems with PV Buses

A power flow analysis method for weakly looped distribution systems with PV buses is proposed in this paper. The proposed method is computationally more efficient and more robust compared with the conventional compensation methods. The robustness is achieved by embedding the boundary conditions of loops and PV buses into the Jacobian matrix. The computational efficiency is achieved by the carefully designed factorization of Jacobian matrix. Test results on a 33 bus system are presented.

DS-CDMA system outer loop power control and improvement for multi-service

When a new user accesses the CDMA system, the load will change drastically, and therefore, the advanced outer loop power control （OLPC） technology has to be adopted to enrich the target signal interference ratio （Silt） and improve the system performance. The existing problems about DS-CDMA outer loop power control for multi-service are introduced and the power control theoretical model is analyzed. System simulation is adopted on how to obtain the theoretical performance and parameter optimization of the power control algorithm. The OLPC algorithm is improved and the performance comparisons between the old algorithm and the improved algorithm are given. The results show good performance of the improved OLPC algorithm and prove the validity of the improved method for multi-service.

Reliability and sensitivity analysis of loop-designed security and stability control system in interconnected power systems

Security and stability control system(SSCS)in power systems involves collecting information and sending the decision from/to control stations at different layers;the tree structure of the SSCS requires more levels.Failure of a station or channel can cause all the execution stations(EXs)to be out of control.The randomness of the controllable capacity of the EXs increases the difficulty of the reliability evaluation of the SSCS.In this study,the loop designed SSCS and reliability analysis are examined for the interconnected systems.The uncertainty analysis of the controllable capacity based on the evidence theory for the SSCS is proposed.The bidirectional and loop channels are introduced to reduce the layers and stations of the existing SSCS with tree configuration.The reliability evaluation and sensitivity analysis are proposed to quantify the controllability and vulnerable components for the SSCS in different configurations.By aiming at the randomness of the controllable capacity of the EXs,the uncertainty analysis of the controllable capacity of the SSCS based on the evidence theory is proposed to quantify the probability of the SSCS for balancing the active power deficiency of the grid.

A LOW POWER TIME-TO-DIGITAL CONVERTER FOR ALL-DIGITAL PHASE-LOCKED LOOP

Time-to-Digital Converter (TDC) is a key block used as the phase/frequency detector in an All-Digital Phase-Locked Loop (ADPLL). Usually, it occupies a large proportion of ADPLL's total power consumption up to about 30% to 40%. In this paper, the detailed power consumption of different components in the TDC is analyzed. A Power Management Block (PMB) is presented for the TDC to reduce its power consumption. A 24-bits TDC core with the proposed PMB is implemented in HJTC 0.18 μm CMOS technology. Simulation results show that up to 84% power reduction is achieved using our proposed technique.

Outer Loop Power Control Algorithm Based on T-norms Information Fusion Technology in TD-SCDMA

An outer loop power control algorithm based on triangle norm(t-norm) information fusion technology is proposed in this paper.According to the difference between block error rate and bit error rate with target values,the membership function calculation and level dividing of the two differences are dealt with.And then t-norm operator is used to fuse the two membership function values to determine the adjustment step-size.The algorithm can acquire the optimal adjustment step-size in the light of the channel status and avoid the overshoot phenomenon of the existing outer power control methods.As a result,the block error rate can converge to the target value quickly.Experiment results verify the excellent property of the algorithm.

Phase-Locked Loop Based Cancellation of ECG Power Line Interference

Power line(PL)interference is one significant artifact in electrocardiography(ECG)that needs to be reduced to ensure accurate recording of cardiac signals.Because PL interference is non-stationary and has varying frequency,phase,and amplitude in ECG measurement,adaptive techniques are often necessary to track and cancel the interference.In this paper we present a phase-locked loop(PLL)-based adaptive filter to cancel PL interference.The PLL obtains the reference signal that is fed into the adaptive filter to remove the PL interference at the central frequency of 50 Hz.It is found that the technique can effectively cancel PL interference in real ECG signals and,when compared with some existing techniques such as least mean squares(LMS)adaptive filter,the new technique produces better results in terms of signal-to-interference ratio(SIR).

Design of a Loop Resonator with Improved Power Transmission Efficiency Using a Ferrite Plate

We propose a novel resonator that can reduce magnetic field leakage using a ferrite plate. The proposed resonator consists of a rectangular loop, a ferrite plate, and an L-matching network. The ferrite plate is used as an H-field reflector to direct more H-field to each resonator, and the L-matching network is employed to match the 50 Ω of the feed cable at 13.56 MHz. Two identical resonators with dimensions of 30 cm × 15 cm are separated by 50 cm, and the resulting transmission efficiency is about ?12.3 dB at 13.56 MHz. This is about 4.2 dB higher than the resonators without the ferrite plate.

A Radio⁃Frequency Loop Resonator for Short⁃Range Wireless Power Transmission

A microstrip loop resonator loaded with a lumped capacitor is proposed for short-range wireless power transmission applications.The overall physical dimensions of the proposed loop resonator configuration are as small as 3 cm by 3 cm.Power transmission efficiency of greater than 80%is achieved with a power transmission distance smaller than 5 mm via the strong coupling between two loop resonators around 1 GHz,as demonstrated by simulations and measurements.Experimental results also show that the power transmission performance is insensitive to various geometrical misalignments.The numerical and experimental results of this paper reveal a bandwidth of more than 50 MHz within which the power transmission efficiency is above 80%.As a result,the proposed microstrip loop resonator has the potential to accomplish efficient wireless power transmission and high-speed(higher than 10 Mbit/s)wireless communication simultaneously.

Novel Control Strategy for Multi-Level Active Power Filter without Phase-Locked-Loop

Active power filter (APF) using novel virtual line-flux-linkage oriented control strategy can not only realizes no phase-locked-loop (PLL) control, but also achieves a good inhibitory effect to interfere. However, there are some problems in the conventional method, such as the error of amplitude, the shift of phase angle and the non-determinacy of initial oriented angle. In this paper, two one-order low-pass filters are adopted instead of the pure integrator in the virtual line-flux-linkage observer, which can steady the phase and amplitude. Furthermore, an original scheme of harmonics detection under the rotating coordinate is advanced based on the simplified space vector pulse width modulation (SVPWM) strategy. Meanwhile, by using the new SVPWM algorithm, the voltage space vector diagram of the three-level inverter can be simplified and applied into that of two-level inverter, and this makes the control for Neutral Point potential easier.

Interference Management for DS-CDMA Systems through Closed-Loop Power Control, Base Station Assignment, and Beamforming

In this paper, we propose a smart step closed-loop power control (SSPC) algorithm and a base station assignment method based on minimizing the transmitter power (BSA-MTP) technique in a direct sequence-code division multiple access (DS-CDMA) receiver with frequency-selective Rayleigh fading. This receiver consists of three stages. In the first stage, with constrained least mean squared (CLMS) algorithm, the desired users’ signal in an arbitrary path is passed and the inter-path interference (IPI) is reduced in other paths in each RAKE finger. Also in this stage, the multiple access interference (MAI) from other users is reduced. Thus, the matched filter (MF) can use for more reduction of the IPI and MAI in each RAKE finger in the second stage. Also in the third stage, the output signals from the matched filters are combined according to the conventional maximal ratio combining (MRC) principle and then are fed into the decision circuit of the desired user. The simulation results indicate that the SSPC algorithm and the BSA-MTP technique can significantly reduce the network bit error rate (BER) compared to the other methods. Also, we observe that significant savings in total transmit power (TTP) are possible with our methods.

Joint Closed-Loop Power Control and Adaptive Beamforming for Wireless Networks with Antenna Arrays in a 2D Urban Environment

The interference reduction capability of antenna arrays and the power control algorithms have been considered separately as means to decrease the interference in wireless communication networks. In this paper, we propose smart step closed-loop power control (SSPC) algorithm in wireless networks in a 2D urban environment with constrained least mean squared (CLMS) algorithm. This algorithm is capable of efficiently adapting according to the environment and able to permanently maintain the chosen frequency response in the look direction while minimizing the output power of the array. Also, we present switched-beam (SB) technique for enhancing signal to interference plus noise ratio (SINR) in wireless networks. Also, we study an analytical approach for the evaluation of the impact of power control error (PCE) on wireless networks in a 2D urban environment. The simulation results indicate that the convergence speed of the SSPC algorithm is faster than other algorithms. Also, we observe that significant saving in total transmit power (TTP) are possible with our proposed algorithm. Finally, we discuss three parameters of the PCE, number of antenna elements, and path-loss exponent and their effects on capacity of the system via some computer simulations.

Loop-Shaping Based Control for Switch Mode DC-DC Power Converters

Renewable energy sources require switching regulators as an interface to a load with high efficiency, small size, proper output regulation, and fast transient response. Moreover, due to the nonlinear behavior and switching nature of DC-DC power electronic converters, there is a need for high-performance control strategies. This work summarized the dynamic behavior for the three basic switch-mode DC-DC power converters operating in continuous conduction mode, i.e. buck, boost, and buck-boost. A controller was designed using loop-shaping based on current-mode control that consists of two feedback loops. A high-gain compensator with wide bandwidth was used in the inner current loop for fast transient response. A proportional-integral controller was used in the outer voltage loop for regulation purposes. A procedure was proposed for the parameters of the controller that ensures closed-loop stability and output voltage regulation. The design-oriented analysis was applied to the three basic switch-mode DC-DC power converters. Experimental results were obtained for a switching regulator with a boost converter of 150 W, which exhibits non-minimum phase behavior. The performance of the controller was tested for voltage regulation by applying large load changes.

弱电网下光伏并网系统锁相环参数自适应控制

针对弱电网下PLL(phase-looked loop,PLL)会使并网逆变器的稳定性下降问题,提出一种锁相环带宽自适应控制策略来实现锁相环参数依据电网实时阻抗值来获得最优的控制参数,保证系统最佳控制性能和稳定运行,从而提升跟网型逆变器在弱电网下的对电网阻抗的适应能力。利用PSCAD/EMTDC进行仿真验证,仿真结果证明自适应控制策略正确、有效。

基于自适应增强型复系数滤波器的多电飞机变频电网状态估计

多电飞机的电网是一种典型的孤岛微网,具有360~800 Hz的宽频率工作范围,传统恒定频率电网同步方法的动态性能在飞机变频电网中有所不足。为了准确估计飞机变频电网的电网状态,结合自适应模块,对增强型复系数滤波器锁相环进行改进,设计了一种适应于MEA变频电网的自适应增强型复系数滤波器锁相环结构(AECCF-PLL)。分析了其传递函数与阶跃响应之间的关系,推导了模型参数与频率的关系,建立了频率自适应模块,满足飞机变频交流电网状态估计对稳定性和快速性的要求。实验结果表明,在飞机变频电网含有大小频率跳变、谐波、斜坡等扰动情况时,提出的AECCF-PLL可以实现对电网状态的快速稳定估计。

不对等权力结构下竞争性闭环供应链的回收模式选择均衡

针对两条具有不对等权力的竞争性闭环供应链,其中双链制造商均可选择己方回收(M模式)、委托零售商回收(R模式)或第三方回收(T模式)的3种模式之一,首先建立和求解博弈模型得到9种可能回收组合下的均衡解、成员利润和链利润,然后基于不同组合的比较推导双链回收模式选择的均衡策略,最后分析均衡组合的Pareto效率。结论表明:①主从链博弈存在“后动优势”现象,特别当从链回收者的回收效率不劣于主链时,从链的各项运营指标完全优于主链;②当从链回收模式任意给定时,无论双链竞争强度如何,主链制造商选择R模式对己方、零售商和整条链最有利;当主链回收模式给定时,随着竞争加剧,M模式、R模式和T模式将依次成为从链制造商和整条从链的最优选择;③RR、RM和RT三种组合均可能是双链的回收模式选择均衡,但在某些条件下RR和RM会陷入低效的囚徒困境。

面向稳控系统E1通道的网络靶场实验台的设计与实现

随着智能电网和跨区稳定控制技术的发展,信息通信与电力系统的耦合更加紧密,网络攻击带来的安全风险也越来越高。稳控系统E1通道作为重要的测控通道,其安全性对稳控系统起到重要的作用,因此,开展面向稳控系统E1通道的半实物仿真和攻防演练,对发现E1通道的安全漏洞有重要意义。首先,基于半实物仿真技术设计了面向稳控系统E1通道的网络靶场实验台,介绍基于该实验台的攻防演练方案;然后,通过该实验台对一个典型的在运稳控系统E1通道开展仿真和攻击模拟实验,测试了稳控系统的安全隐患,并验证了实验台的有效性;最后,提出几种提升E1通道安全性的方法,并展望了实验台的应用前景。

电网故障下含直驱风电机组的电力系统频率动态响应分析

电网受扰后基于模型解析的频率响应分析对电力系统安全评估与紧急控制具有重要意义。电网发生故障时,直驱风电机组(DDWT)并网点电压幅值跌落引发控制器暂态响应,同时电压相位突变引发锁相暂态响应,锁相暂态响应又通过变流器控制传导产生功率控制误差,可能导致现有以负荷突变场景为对象的频率特性分析产生较大偏差。为此,提出了电网故障下DDWT锁相偏差的量化方法;解析了锁相偏差经DDWT变流器控制的传导路径,提出了锁相暂态响应导致DDWT功率控制误差的机理及其计算方法;建立了电网故障下含DDWT的电力系统频率响应模型,提出了锁相暂态响应影响下系统频率变化率和最大频率偏差的计算方法,解析了电网故障下考虑DDWT功率控制误差的电力系统频率动态响应特性,并通过算例分析验证了所提方法的有效性。