In the present work, computational simulations was made using ANSYS CFX to predict the improvements in film cooling performance with dual trench. Dual-trench confguradon consists of two trenches together, one wider tr...In the present work, computational simulations was made using ANSYS CFX to predict the improvements in film cooling performance with dual trench. Dual-trench confguradon consists of two trenches together, one wider trench and the other is narrow trench that extruded from the wider one. Several blowing ratios in the range （0.5：5） were investigated. The pitch-to-diameter ratio of 2.775 is used. By using the dual trench configuration, the coolant jet impacted the trench wall two times allowing increasing the spreading of coolant laterally in the trench, reducing jet velocity and jet completely covered on the surface. The results indicate that this configuration increased adiabatic effectiveness as blowing ratio increased. The spatially averaged adiabatic effectiveness reached 57.6% for at M= 2. No observed film blow-off at all blowing ratios. The adiabatic film effectiveness of dual trench case outperformed the narrow trench case, laidback fan-shaped hole, fan-shaped hole and cylinder hole at different blowing ratios.展开更多
A new high voltage trench lateral double-diffused metal–oxide semiconductor （LDMOS） with ultra-low specific onresistance （R on,sp ） is proposed. The structure features a dual gate （DG LDMOS）： a planar gate and...A new high voltage trench lateral double-diffused metal–oxide semiconductor （LDMOS） with ultra-low specific onresistance （R on,sp ） is proposed. The structure features a dual gate （DG LDMOS）： a planar gate and a trench gate inset in the oxide trench. Firstly, the dual gate can provide a dual conduction channel and reduce R on,sp dramatically. Secondly, the oxide trench in the drift region modulates the electric field distribution and reduces the cell pitch but still can maintain comparable breakdown voltage （BV）. Simulation results show that the cell pitch of the DG LDMOS can be reduced by 50% in comparison with that of conventional LDMOS at the equivalent BV; furthermore, R on,sp of the DG LDMOS can be reduced by 67% due to the smaller cell pitch and the dual gate.展开更多
基金Supprted by Harbin Engineering University Scholarship under Grant No. 20100903D01
文摘In the present work, computational simulations was made using ANSYS CFX to predict the improvements in film cooling performance with dual trench. Dual-trench confguradon consists of two trenches together, one wider trench and the other is narrow trench that extruded from the wider one. Several blowing ratios in the range （0.5：5） were investigated. The pitch-to-diameter ratio of 2.775 is used. By using the dual trench configuration, the coolant jet impacted the trench wall two times allowing increasing the spreading of coolant laterally in the trench, reducing jet velocity and jet completely covered on the surface. The results indicate that this configuration increased adiabatic effectiveness as blowing ratio increased. The spatially averaged adiabatic effectiveness reached 57.6% for at M= 2. No observed film blow-off at all blowing ratios. The adiabatic film effectiveness of dual trench case outperformed the narrow trench case, laidback fan-shaped hole, fan-shaped hole and cylinder hole at different blowing ratios.
基金Project supported by the National Natural Science Foundation of China (Grant No. 61176069)the National Key Laboratory of Analog Integrated Circuit,China (Grant No. 9140C090304110C0905)the Innovation Foundation of the State Key Laboratory of Electronic Thin Films and Integrated Devices,China (Grant No. CXJJ201004)
文摘A new high voltage trench lateral double-diffused metal–oxide semiconductor （LDMOS） with ultra-low specific onresistance （R on,sp ） is proposed. The structure features a dual gate （DG LDMOS）： a planar gate and a trench gate inset in the oxide trench. Firstly, the dual gate can provide a dual conduction channel and reduce R on,sp dramatically. Secondly, the oxide trench in the drift region modulates the electric field distribution and reduces the cell pitch but still can maintain comparable breakdown voltage （BV）. Simulation results show that the cell pitch of the DG LDMOS can be reduced by 50% in comparison with that of conventional LDMOS at the equivalent BV; furthermore, R on,sp of the DG LDMOS can be reduced by 67% due to the smaller cell pitch and the dual gate.
