Enhancing ion conductance and controlling transport pathway in organic electrolyte could be used to modulate ionic kinetics to handle signals. In a Pt/Poly(3-hexylthiophene-2,5-diyl)/Polyethylene?Li CF3SO3/Pt hetero-j...Enhancing ion conductance and controlling transport pathway in organic electrolyte could be used to modulate ionic kinetics to handle signals. In a Pt/Poly(3-hexylthiophene-2,5-diyl)/Polyethylene?Li CF3SO3/Pt hetero-junction, the electrolyte layer handled at high temperature showed nano-fiber microstructures accompanied with greatly improved salt solubility. Ions with high mobility were confined in the nano-fibrous channels leading to the semiconducting polymer layer,which is favorable for modulating dynamic doping at the semiconducting polymer/electrolyte interface by pulse frequency.Such a device realized synaptic-like frequency selectivity, i.e., depression at low frequency stimulation but potentiation at high-frequency stimulation.展开更多
As low power consumption is the main design issue involved in a network on chip (NoC), researchers are concentrating more on both algorithms and architectural approaches. The conventional Dynamic Frequency Scalin...As low power consumption is the main design issue involved in a network on chip (NoC), researchers are concentrating more on both algorithms and architectural approaches. The conventional Dynamic Frequency Scaling (DFS) and history based Frequency Scaling (HDFS) algorithms are utilized to process the energy constrained data traffic. However, these conventional algorithms achieve higher energy efficiencies, and they result in performance degradation due to the auxiliary latency between clock domains. In this paper, we present a variable power optimization interface for NoC using a Finite State Machine (FSM) approach to attain better performance improvement. The parameters are estimated using 45 nm TSMCCMOS technology. In comparison with DFS system, the evaluation results show that FSM-DFS link achieves 81.55% dynamic power savings on the links in the on-chip network, and 37.5% leakage power savings of the link. Also, this proposed work is evaluated for various performance parameters and compared with conventional work. The simulation results are superior to conventional work.展开更多
基金supported by National Natural Science foundation of China (Grant Nos. 51371103 and 51231004)National Basic Research Program of China (Grant No. 2010CB832905)+1 种基金National Hi-tech (R&D) Project of China (Grant Nos. 2012AA03A706, 2013AA030801)the Research Project of Chinese Ministry of Education (No. 113007A)
文摘Enhancing ion conductance and controlling transport pathway in organic electrolyte could be used to modulate ionic kinetics to handle signals. In a Pt/Poly(3-hexylthiophene-2,5-diyl)/Polyethylene?Li CF3SO3/Pt hetero-junction, the electrolyte layer handled at high temperature showed nano-fiber microstructures accompanied with greatly improved salt solubility. Ions with high mobility were confined in the nano-fibrous channels leading to the semiconducting polymer layer,which is favorable for modulating dynamic doping at the semiconducting polymer/electrolyte interface by pulse frequency.Such a device realized synaptic-like frequency selectivity, i.e., depression at low frequency stimulation but potentiation at high-frequency stimulation.
文摘As low power consumption is the main design issue involved in a network on chip (NoC), researchers are concentrating more on both algorithms and architectural approaches. The conventional Dynamic Frequency Scaling (DFS) and history based Frequency Scaling (HDFS) algorithms are utilized to process the energy constrained data traffic. However, these conventional algorithms achieve higher energy efficiencies, and they result in performance degradation due to the auxiliary latency between clock domains. In this paper, we present a variable power optimization interface for NoC using a Finite State Machine (FSM) approach to attain better performance improvement. The parameters are estimated using 45 nm TSMCCMOS technology. In comparison with DFS system, the evaluation results show that FSM-DFS link achieves 81.55% dynamic power savings on the links in the on-chip network, and 37.5% leakage power savings of the link. Also, this proposed work is evaluated for various performance parameters and compared with conventional work. The simulation results are superior to conventional work.
