Gigahertz frequency hopping in an optical phase-locked loop for Raman lasers

Raman lasers are essential in atomic physics,and the development of portable devices has posed requirements for time-division multiplexing of Raman lasers.We demonstrate an innovative gigahertz frequency hopping approach of a slave Raman laser within an optical phase-locked loop(OPLL),which finds practical application in an atomic gravimeter,where the OPLL frequently switches between near-resonance lasers and significantly detuned Raman lasers.The method merges the advantages of rapid and extensive frequency hopping with the OPLL’s inherent low phase noise,and exhibits a versatile range of applications in compact laser systems,promising advancements in portable instruments.

Dynamic Free-Spectral-Range Measurement for Fiber Resonator Based on Digital-Heterodyne Optical Phase-Locked Loop

We propose a novel scheme, based on digital-heterodyne optical phase-locked loop with whole-fiber circuit, to dynamically measure the free-spectral-range of a fiber resonator. The optical phase-locked loop is established with a differential frequency-modulation module consists of a pair of acousto-optic modulators. The resonance-tracking loop is derived with the Pound-Drever-Hall technique for locking the heterodyne frequency of the OPLL on the frequency difference between adjacent resonance modes. A stable locking accuracy of about 7 × 10?9 and a dynamic locking accuracy of about 5 × 10?8 are achieved with the FSR of 8.155 MHz, indicating a bias stability of the resonator fiber optic gyro of about 0.1?/h with 10 Hz bandwidth. In addition, the thermal drift coefficient of the FSR is measured as 0.1 Hz/?C. This shows remarkable potential for realizing advanced optical measurement systems, such as the resonant fiber optic gyro, and so on.

Research on strategic risk identification method of equipment system development based on system dynamics

Strategic management of equipment system develop-ment must attach importance to effective strategic risk manage-ment.Aiming at the identification of strategic risk of equipment system development,firstly,the source of strategic risk of equip-ment system development is analyzed and classified.Based on this,a causal loop diagram of strategic risk of equipment sys-tem development based on system dynamics is established.The system dynamics analysis software Vensim PLE is used to carry out the risk influencing factors analysis,risk consequences ana-lysis,risk feedback loop identification and corresponding pre-control measures,and achieves a good risk identification effect.

11.6-GHz 0.18-μm monolithic CMOS phase-locked loop

A design of a ll. 6-GHz phase-locked loop （PLL） fabricated in 49-GHz 0. 18-μm CMOS （complementary metal-oxide-semiconductor transistor） technology is described. An analog multiplier phase detector （PD）, a one-pole passive low pass filter and a three-stage ring oscillator with variable negativeresistance loads build up the monolithic phase-locked loop. The measured rms jitter of output signal via onwafer testing is 2. 2 ps under the stimulation of 2^31 - 1 bit-long pseudo random bit sequence （PRBS） at the bit rate of 11.6 GHz. And the tracking range is 250 MHz. The phase noise in the locked condition is measured to be - 107 dBc/Hz at 10 MHz offset, and that of the ring VCO at the central frequency is -99 dBc/Hz at 10 MHz offset. The circuit area of the proposed PLL is only 0. 47mm×0.72mm and the direct current （DC） power dissipation is 164 mW under a 1.8-V supply.

HYDRODYNAMIC STUDIES ON LOOP REACTORS (Ⅱ) AIRLIFT LOOP REACTORS

Hydrodynamics of airlift loop reactors was studied in detail experimentally andtheoretically.An internal airlift loop reactor was designed and set up for this study.An instru-mentation system based on the electrochemical method was adapted to measure local gas holdup andliquid velocity.A two-dimensional two-fluid model based on the first principles was established andimplemented to model the flow in airlift loop reactors.A corrected turbulent model was incorporatedin the simulation.The shear rate,shear stress and energy dissipation are evaluated from the flowfield.The numerically predicted results and experimental data obtained from this work as well as thesereported in literature are analyzed and compared.

Optimization of the carrier tracking loop for GPS high dynamic receivers

A carrier tracking loop which can adjust the loop parameters adaptively is proposed for high dynamic application. Three modules, called the α-β-γT filter model, adaptive loop structure mod- el and adaptive loop bandwidth model respectively, are added in the presented tracking loop com- pared with the traditional carrier tracking loop based on the second-order frequency lock loop （FLL） assisting third-order phase lock loop （PLL） loop filter. And the optimization methods for the track- ing bandwidth and the carrier loop order are analyzed. The real-time estimation methods of the dy- namic parameters, the velocity, acceleration and jerk along the line of sight （LOS） between the sat- ellite and the receiver＇ s antenna, and the measurement parameters are discussed based on the pres- ented α-β-γ filter algorithm. A method is introduced to improve the filter＇ s dynamic response to meet high dynamic application by self-adjusted α-β-γ filter coefficient used in the tracking loop. The performance of three cases with different carrier tracking loop is compared by simulation.

A frequency servo SoC with output power stabilization loop technology for miniaturized atomic clocks

A frequency servo system-on-chip(FS-SoC)featuring output power stabilization technology is introduced in this study for high-precision and miniaturized cesium(Cs)atomic clocks.The proposed power stabilization loop(PSL)technique,incorporating an off-chip power detector(PD),ensures that the output power of the FS-SoC remains stable,mitigating the impact of power fluctuations on the atomic clock's stability.Additionally,a one-pulse-per-second(1PPS)is employed to syn-chronize the clock with GPS.Fabricated using 65 nm CMOS technology,the measured phase noise of the FS-SoC stands at-69.5 dBc/Hz@100 Hz offset and-83.9 dBc/Hz@1 kHz offset,accompanied by a power dissipation of 19.7 mW.The Cs atomic clock employing the proposed FS-SoC and PSL obtains an Allan deviation of 1.7×10^(-11) with 1-s averaging time.

Prediction of flexoelectricity in BaTiO_(3) using molecular dynamics simulations

Flexoelectric effect, referring to the strain gradient induced polarization, widely exists in dielectric materials, but its molecular dynamics has not been studied so much so far. In this work, the radial distribution function of BaTiO_(3) and the phase transition temperatures have been investigated, and the results show that the core-shell potential model is effective and the structure of BaTiO_(3) is stable in a temperature range of 10 K–150 K. Molecular dynamics simulated hysteresis loops of BaTiO_(3) show that anisotropy can play an important role in the coercive field. Based on the rational simulation process,the effects of cantilever beam bent angle and fixed length on the polarization are analyzed. It is found that the small bent angle of the curved cantilever beam can give a proportional relationship with a fixed end length and a non-linear relationship is presented when the bent angle is much larger. The prediction of flexoelectric coefficient in BaTiO_(3) is 18.5 nC/m. This work provides a computational framework for the study of flexoelectric effect by using molecular dynamics.

HYDRODYNAMIC STUDIES ON LOOP REACTORS (Ⅰ) LIQUID JET LOOP REACTORS

Understanding of hydrodynamics in liquid jet loop reactors is a prerequisite step for the fur-ther study of multi-phase flow in loop reactors.A hydrodynamic simulation for liquid jet loop reac-tors is developed from the first principles of transport phenomena in this paper.The turbulence istaken into account by using the standard k-ε model.This approach is used to study the influence ofconfiguration and viscosity on the hydrodynamics.The results are in very reasonable coincidence to ex-perimental data in literature.

CMOS analog and mixed-signal phase-locked loops: An overview

CMOS analog and mixed-signal phase-locked loops(PLL)are widely used in varies of the system-on-chips(SoC)as the clock generator or frequency synthesizer.This paper presents an overview of the AMS-PLL,including:1)a brief introduction of the basics of the charge-pump based PLL,which is the most widely used AMS-PLL architecture due to its simplicity and robustness;2)a summary of the design issues of the basic CPPLL architecture;3)a systematic introduction of the techniques for the performance enhancement of the CPPLL;4)a brief overview of ultra-low-jitter AMS-PLL architectures which can achieve lower jitter(<100 fs)with lower power consumption compared with the CPPLL,including the injection-locked PLL(ILPLL),subsampling(SSPLL)and sampling PLL(SPLL);5)a discussion about the consideration of the AMS-PLL architecture selection,which could help designers meet their performance requirements.

An improved arctangent algorithm based on phase-locked loop for heterodyne detection system

We present an ameliorated arctangent algorithm based on phase-locked loop for digital Doppler signal processing,utilized within the heterodyne detection system. We define the error gain factor given by the approximation of Taylor expansion by means of a comparison of the measured values and true values. Exact expressions are derived for the amplitude error of two in-phase & quadrature signals and the frequency error of the acousto-optic modulator. Numerical simulation results and experimental results make it clear that the dynamic instability of the intermediate frequency signals leads to cumulative errors, which will spiral upward. An improved arctangent algorithm for the heterodyne detection is proposed to eliminate the cumulative errors and harmonic components. Depending on the narrow-band filter, our experiments were performed to realize the detectable displacement of 20 nm at a detection distance of 20 m. The aim of this paper is the demonstration of the optimized arctangent algorithm as a powerful approach to the demodulation algorithm, which will advance the signal-to-noise ratio and measurement accuracy of the heterodyne detection system.

Design of radiation hard phase-locked loop at 2.5 GHz using SOS-CMOS

A radiation hard phase-locked loop （PLL） is designed at 2.5 GHz using silicon on sapphire complementary metal-oxide-semiconductor process. Radiation hardness is achieved through improving circuit design without sacrificing real estate. Stability is guaranteed by a fully self-bias architecture. The lock time of PLL is minimized by maximizing the loop bandwidth. Frequency tuning range of voltage controlled oscillator is significantly enhanced by a novel load configuration. In addition, multiple bias stages, asynchronous frequency divider, and silicon on sapphire process jointly make the proposed PLL more radiation hard. Layout of this PLL is simulated by Cadence Spectre RF under both single event effect and total induced dose effect. Simulation results demonstrate excellent stability, lock time 〈 600 ns, frequency tuning range [1.57 GHz, 3.46 GHz], and jitter 〈 12 ps. Through comparison with PLLs in literatures, the PLL is especially superior in terms of lock time and frequency tuning range performances.

A 5.12-GHz LC-based phase-locked loop for silicon pixel readouts of high-energy physics

There is an urgent need for high-quality and high-frequency clock generators for high-energy physics experiments.The transmission data rate exceeds 10 Gbps for a single channel in future readout electronics of silicon pixel detectors.Others,such as time measurement detectors,require a high time resolution based on the time-to-digital readout architecture.A phase-locked loop(PLL)is an essential and broadly used circuit in these applications.This study presents an application-specific integrated circuit of a low-jitter,low-power LC-tank that is PLL fabricated using 55-nm CMOS technology.It includes a 3rd-order frequency synthesis loop with a programmable bandwidth,a divide-by-2 pre-scaler,standard low-voltage differential signaling interfaces,and a current mode logic(CML)driver for clock transmissions.All the d-flip-flop dividers and phase-frequency detectors are protected from single-event upsets using the triple modular redundancy technique.The proposed VCO uses low-pass filters to suppress the noise from bias circuits.The tested LC-PLL covers a frequency locking range between 4.74 GHz and 5.92 GHz with two sub-bands.The jitter measurements of the frequency-halved clock(2.56 GHz)are less than 460 fs and 0.8 ps for the random and deterministic jitters,respectively,and a total of 7.5 ps peak-to-peak with a bit error rate of 10^(-12).The random and total jitter values for frequencies of 426 MHz and 20 MHz are less than 1.8 ps and 65 ps,respectively.The LC-PLL consumed 27 mW for the core and 73.8 mW in total.The measured results nearly coincided with the simulations and validated the analyses and tests.

A LOW POWER TIME-TO-DIGITAL CONVERTER FOR ALL-DIGITAL PHASE-LOCKED LOOP

Time-to-Digital Converter (TDC) is a key block used as the phase/frequency detector in an All-Digital Phase-Locked Loop (ADPLL). Usually, it occupies a large proportion of ADPLL's total power consumption up to about 30% to 40%. In this paper, the detailed power consumption of different components in the TDC is analyzed. A Power Management Block (PMB) is presented for the TDC to reduce its power consumption. A 24-bits TDC core with the proposed PMB is implemented in HJTC 0.18 μm CMOS technology. Simulation results show that up to 84% power reduction is achieved using our proposed technique.

Dynamics simulation of the belt conveyor possessing feedback loop during starting

Synthesizing the mechanical models of the belt, the driver and the take-up device, the dynamics model was established on the longitudinal vibration of the overall belt conveyor system with finite elemental method, and S-function simulation block of asynchronous motor owing feedback function was built in Matlab/Simulink software, the simulation block indicates that motor rotation speed and its output moment vary with load and time, and the motor is a dynamic feedback system in working process. The state space block was adopted to express model of the belt. Thus it created simulation model of established dynamic model of overall belt conveyor system with Mat- lab/Simulink software, and simulates the course of starting by properly setting simulation parameters, and processes data for visualization.

Dynamics and adaptive control of a dual-arm space robot with closed-loop constraints and uncertain inertial parameters

A dynamics-based adaptive control approach is proposed for a planar dual-arm space robot in the presence of closed-loop constraints and uncertain inertial parameters of the payload. The controller is capable of controlling the po- sition and attitude of both the satellite base and the payload grasped by the manipulator end effectors. The equations of motion in reduced-order form for the constrained system are derived by incorporating the constraint equations in terms of accelerations into Kane＇s equations of the unconstrained system. Model analysis shows that the resulting equations perfectly meet the requirement of adaptive controller design. Consequently, by using an indirect approach, an adaptive control scheme is proposed to accomplish position/attitude trajectory tracking control with the uncertain parameters be- ing estimated on-line. The actuator redundancy due to the closed-loop constraints is utilized to minimize a weighted norm of the joint torques. Global asymptotic stability is proven by using Lyapunov＇s method, and simulation results are also presented to demonstrate the effectiveness of the proposed approach.

Effects of interstitial cluster mobility on dislocation loops evolution under irradiation of austenitic steel

The evolution of dislocation loops in austenitic steels irradiated with Fe^(+)is investigated using cluster dynamics(CD)simulations by developing a CD model.The CD predictions are compared with experimental results in the literature.The number density and average diameter of the dislocation loops obtained from the CD simulations are in good agreement with the experimental data obtained from transmission electron microscopy(TEM)observations of Fe~+-irradiated Solution Annealed 304,Cold Worked 316,and HR3 austenitic steels in the literature.The CD simulation results demonstrate that the diffusion of in-cascade interstitial clusters plays a major role in the dislocation loop density and dislocation loop growth;in particular,for the HR3 austenitic steel,the CD model has verified the effect of temperature on the density and size of the dislocation loops.

STATIC CORRECTION MODES IN DYNAMICAL SIMULATION OF FLEXIBLE MULTIBODY SYSTEM WITH CLOSED LOOPS

By use of the recursive formulation of flexible multibody system with closed loops,this paper studies the dynamic simulation of complicated multibody system.The conception of static correction modes in structural dynamics is introduced to present the local deformation effects due to reaction forces at kinematic joints.A space four bar mechanism is utilized here as an example to describe the method of selecting static correction modes.Compared with vibration normal modes, static correction modes are demonstrated to be effective in numerical simulation.

Digital implementation and analysis of a high dynamic frequency tracking loop

In the wireless guidance system, the signals that receiver received has obvious Doppler shift for the high dynamic characteristic of the carrier. A new solution of carrier frequency tracking loop with frequency modifying system is put forward. The characteristic of cross product auto frequency control and the second order loop filter in this loop are analyzed. The simulation shows that this loop can accomplish frequency tracking well in high dynamic circumstance.

Phase-Locked Loop Based Cancellation of ECG Power Line Interference

Power line(PL)interference is one significant artifact in electrocardiography(ECG)that needs to be reduced to ensure accurate recording of cardiac signals.Because PL interference is non-stationary and has varying frequency,phase,and amplitude in ECG measurement,adaptive techniques are often necessary to track and cancel the interference.In this paper we present a phase-locked loop(PLL)-based adaptive filter to cancel PL interference.The PLL obtains the reference signal that is fed into the adaptive filter to remove the PL interference at the central frequency of 50 Hz.It is found that the technique can effectively cancel PL interference in real ECG signals and,when compared with some existing techniques such as least mean squares(LMS)adaptive filter,the new technique produces better results in terms of signal-to-interference ratio(SIR).