New Forward Gated-Diode Technique for Separating Front Gate Interface- from Oxide-Traps Induced by Hot-Carrier-Stress in SOI-NMOSFETs

The front gate interface and oxide traps induced by hot carrier stress in SOI NMOSFETs are studied.Based on a new forward gated diode technique,the R G current originating from the front interface traps is measured,and then the densities of the interface and oxide traps are separated independently.The experimental results show that the hot carrier stress of front channel not only results in the strong generation of the front interface traps,but also in the significant oxide traps.These two kinds of traps have similar characteristic in increasing with the hot carrier stress time.This analysis allows one to obtain a clear physical picture of the effects of the hot carrier stress on the generating of interface and oxide traps,which help to understand the degradation and reliability of the SOI MOSFETs.

Oxide Thickness Effects on n-MOSFETs Under On-State Hot-Carrier Stress

Hot carrier induced (HCI) degradation of surface channel n MOSFETs with different oxide thicknesses is investigated under maximum substrate current condition.Results show that the key parameters m and n of Hu's lifetime prediction model have a close relationship with oxide thickness.Furthermore,a linear relationship is found between m and n .Based on this result,the lifetime prediction model can be expended to the device with thinner oxides.

Unified Degradation Model in Low Gate Voltage Range During Hot-Carrier Stressing of p-MOS Transistors

Hot carrier effects of p MOSFETs with different oxide thicknesses are studied in low gate voltage range.All electrical parameters follow a power law relationship with stress time,but degradation slope is dependent on gate voltage.For the devices with thicker oxides,saturated drain current degradation has a close relationship with the product of gate current and electron fluence.For small dimensional devices,saturated drain current degradation has a close relationship with the electron fluence.This degradation model is valid for p MOSFETs with 0 25μm channel length and different gate oxide thicknesses.

Suppressing the hot carrier injection degradation rate in total ionizing dose effect hardened nMOSFETs

Annular gate nMOSFETs are frequently used in spaceborne integrated circuits due to their intrinsic good capability of resisting total ionizing dose （TID） effect. However, their capability of resisting the hot carrier effect （HCE） has also been proven to be very weak. In this paper, the reason why the annular gate nMOSFETs have good TID but bad HCE resistance is discussed in detail, and an improved design to locate the source contacts only along one side of the annular gate is used to weaken the HCE degradation. The good TID and HCE hardened capability of the design are verified by the experiments for I/O and core nMOSFETs in a 0.18 μm bulk CMOS technology. In addition, the shortcoming of this design is also discussed and the TID and the HCE characteristics of the replacers （the annular source nMOSFETs） are also studied to provide a possible alternative for the designers.

Evaluation of effective carrier system and function on hydrocarbon accumulation in Gaoyou Sag,Subei Basin,China

Effective carrier system comprises carrier beds which transport hydrocarbons. The spatial and temporal effectiveness of carrier system is identified according to the relevance of hydrocarbon show, hydrocarbon inclusion and sealing ability of fault to hydrocarbons distribution, together with matching relation of activity history of fault and hydrocarbon generation history of source rock. On the basis of the above considerations, transporting ability of effective carrier system can be evaluated using parameters such as fluid potential, porosity and permeability, spatial coefficient of effective pathway as well as activity rate of fault. Additionally, a new concept of＂transporting threshold porosity＂ was proposed. Five styles of effective carrier systems were established in Gaoyou Sag, displaying either layered or zonal distribution characteristics, and transporting time ranges from the sedimentary time of Ezdz to early stage of sanduo uplift. Effective carrier systems can be described to be lowly-efficient and highly-efficient. Major faults （convex or steep fault plane） with activity rate greater than 20 m/Ma and structure ridges of sand layers with spatial coefficient of effective pathway greater than 25% are defined to be highly-efficient carrier beds. Hydrocarbons are concentrated around high-efficient carrier beds and E1 f traps of northern shanian area are predicted to have great potential.

Effect of Residual Charge Carrier on the Performance of a Graphene Field Effect Transistor

The temperature-dependent effect of residual charge carrier （no）, at the Dirac point, on mobility is studied. We fabricate and characterize a graphene field effect transistor （GFET） using 7nm TiO2 as the top-gate dielectric. The temperature-dependent gate voltage-drain current and room temperature gate capacitance are measured to extract the carrier mobility and to estimate the quantum capacitance of the GFET. The device shows the mobility value of gOO cm^2 /V.s at room temperature and it decreases to 45 cm^2 /V.s for 20 K due to the increase of n0. These results indicate that the phonon scattering is not the dominant process for the unevenness dielectric layer while the coulomb scattering by charged impurities degrades the device characteristically at low temperature.

Hot carrier degradation and a new lifetime prediction model in ultra-deep sub-micron pMOSFET

The hot carrier effect （HCE） of an ultra-deep sub-micron p-channel metal–oxide semiconductor field-effect transistor （pMOSFET） is investigated in this paper. Experiments indicate that the generation of positively charged interface states is the predominant mechanism in the case of the ultra-deep sub-micron pMOSFET. The relation of the pMOSFET hot carrier degradation to stress time （t）, channel width （W ）, channel length （L）, and stress voltage （Vd ） is then discussed. Based on the relation, a lifetime prediction model is proposed, which can predict the lifetime of the ultra-deep sub-micron pMOSFET accurately and reflect the influence of the factors on hot carrier degradation directly.

Anomalous Emission And Carrier Effect of Fresh Porous Silicon

The emission and Fourier transformation infrared spectra of freshly prepared porous silicon(PS) and the silicon wafer were examined. Increasing temperature generally led to a decrease in the emission intensities of the PS samples, however, the freshly prepared sample showed an unusually large and sudden increase in its emission intensity at the specific temperature at which the hydrogen ion conductivity in the silicon wafer increased. The O-H vibrations of the silicon wafer also showed a sudden decrease at the same temperature. These results are consistent with the assumption that the luminescence of fresh PS comes from the carrier bound exciton in its confined nanostructure.

Combined effects of carrier scattering and Coulomb screening on photoluminescence in InGaN/GaN quantum well structure with high In content

Photoluminescence(PL) spectra of two different green InGaN/GaN multiple quantum well(MQW) samples S1 and S2,respectively with a higher growth temperature and a lower growth temperature of InGaN well layers are analyzed over a wide temperature range of 6 K-3 30 K and an excitation power range of 0.001 mW-75 mW.The excitation power-dependent PL peak energy and linewidth at 6 K show that in an initial excitation power range,the emission process of the MQW is dominated simultaneously by the combined effects of the carrier scattering and Coulomb screening for both the samples,and both the carrier scattering effect and the Coulomb screening effect are stronger for S2 than those for S1;in the highest excitation power range,the emission process of the MQWs is dominated by the filling effect of the high-energy localized states for S1,and by the Coulomb screening effect for S2.The behaviors can be attributed to the fact that sample S2 should have a higher amount of In content in the InGaN well layers than S1 because of the lower growth temperature,and this results in a stronger component fluctuation-induced potential fluctuation and a stronger well/barrier lattice mismatchinduced quantum-confined Stark effect.This explanation is also supported by other relevant measurements of the samples,such as temperature-dependent peak energy and excitation-power-dependent internal quantum efficiency.

STUDY ON THE RELATION BETWEEN STRUCTURE AND HOT CARRIER EFFECT IMMUNITY FOR DEEP SUB-MICRON GROOVED GATE NMOSFET's

Grooved gate structure Metal-Oxide-Semiconductor (MOS) device is consideredas the most promising candidate used in deep and super-deep sub-micron region, for it cansuppress hot carrier effect and short channel effect deeply. Based on the hydrodynamic energytransport model, using two-dimensional device simulator Medici, the relation between structureparameters and hot carrier effect immunity for deep-sub-micron N-channel MOSFET's is studiedand compared with that of counterpart conventional planar device in this paper. The examinedstructure parameters include negative junction depth, concave corner and effective channel length.Simulation results show that grooved gate device can suppress hot carrier effect deeply even indeep sub-micron region. The studies also indicate that hot carrier effect is strongly influencedby the concave corner and channel length for grooved gate device. With the increase of concavecorner, the hot carrier effect in grooved gate MOSFET decreases sharply, and with the reducingof effective channel length, the hot carrier effect becomes large.

Pressure Effects on the Charge Carrier Transportation of BaF_2 Nanocrystals

The charge transport behavior of barium fluoride nanocrystals is investigated by in situ impedance measurement up to 35 GPa. It is found that the parameters change discontinuously at about 6.9 GPa, corresponding to the phase transition of BaF2 nanocrystals under high pressure. The charge carriers in BaF2 nanocrystals include both Fions and electrons. Pressure makes the electronic transport more difficult. The defects at grains dominate the electronic transport process. Pressure could make the charge-discharge processes in the Fm3m phase more difficult.

Control of gain and thermal carrier loss profiles for mode optimization in 980-nm broad-area vertical-cavity surface-emitting lasers

Optical gain and thermal carrier loss distributions regarding current diffusion and various electric contact areas are investigated to improve the near-field modes from the ring-shape to a Gaussian-like configuration for extra-broad-area and oxide-confined vertical-cavity surface-emitting lasers. In this work an equivalent circuit network model is used. The resistance of the continuously-graded distributed Bragg reflectors （DBRs）, the current diffusion and the temperature effect due to different electric-contact areas are calculated and analyzed at first, as these parameters affect one another and are the key factors in determining the gain and thermal carrier loss. Finally, the gain and thermal carrier loss distributions are calculated and discussed.

A Novel Empirical Model of I-V Characteristics for LDD MOSFET Including Substrate Current

A compact model for LDD MOSFET is proposed,which involves the hyperbolic tangent function description and the physics of device with emphasis on the substrate current modeling.The simulation results demonstrate good agreement with measurement,and show that deep submicron LDD MOSFET has larger substrate current than submicron device does.The improved model costs low computation consumption,and is effective in manifestation of hot carrier effect and other effects in deep submicron devices,in turn is suitable for design and reliability analysis of scaling down devices.

ZnO nanorod decorated by Au-Ag alloy with greatly increased activity for photocatalytic ethylene oxidation

In recent years, the preservation of fruits and vegetables in cold storage has become an issue of increasing concern, ethylene plays a leading role among them. We found ZnO has the effect of degrading gaseous ethylene, however its effect is not particularly satisfactory. Therefore, we used simple photo-deposition procedure and low-temperature calcination method to synthesize Au, Ag, and Au Ag alloy supported ZnO to improve the photocatalytic efficiency. Satisfactorily, after ZnO loaded with sole Au or Ag particles, the efficiency of ethylene degradation was 17.5 and 26.8 times than that of pure ZnO, showing a large increase in photocatalytic activity. However, the photocatalytic stability of Ag/ZnO was very poor, because Ag can be easily photooxidized to Ag2O. Surprisingly, when ZnO was successfully loaded with the Au Ag alloy, not only the photocatalytic activity was further improved to 94.8 times than that of pure ZnO, but also the photocatalytic stability was very good after 10 times of cycles. Characterization results explained that the Au-Ag alloy NPs modified ZnO showed great visible-light absorption because of the surface plasmon resonance(SPR) effect. Meanwhile, the higher photocurrent density showed the effective carrier separation ability in Au Ag/ZnO. Therefore, the cooperative action of plasmonic Au Ag bimetallic alloy NPs and efficient carrier separation capability result in the outstanding photoactivity of ethylene oxidation. At the same time, the formation of the alloy produced a new crystal structure different from Au and Ag, which overcomes the problem of poor stability of Ag/ZnO, and finally obtains Au Ag/ZnO photocatalyst with high activity and high stability. This work proposes a new concept of using metal alloys to remove ethylene in actual production.

Crystalline silicon surface passivation investigated by thermal atomic-layer-deposited aluminum oxide

Atomic-layer-deposited（ALD） aluminum oxide（Al2O3） has demonstrated an excellent surface passivation for crystalline silicon（c-Si） surfaces, as well as for highly boron-doped c-Si surfaces. In this paper, water-based thermal atomic layer deposition of Al2O3 films are fabricated for c-Si surface passivation. The influence of deposition conditions on the passivation quality is investigated. The results show that the excellent passivation on n-type c-Si can be achieved at a low thermal budget of 250℃ given a gas pressure of 0.15 Torr. The thickness-dependence of surface passivation indicates that the effective minority carrier lifetime increases drastically when the thickness of Al2O3 is larger than 10 nm. The influence of thermal post annealing treatments is also studied. Comparable carrier lifetime is achieved when Al2O3 sample is annealed for 15 min in forming gas in a temperature range from 400℃ to 450℃. In addition, the passivation quality can be further improved when a thin PECVD-SiNx cap layer is prepared on Al2O3, and an effective minority carrier lifetime of2.8 ms and implied Voc of 721 mV are obtained. In addition, several novel methods are proposed to restrain blistering.

Variation of passivation behavior induced by sputtered energetic particles and thermal annealing for ITO/SiO_x/Si system

The damage on the atomic bonding and electronic state in a SiO_x（1.4-2.3 nm）/c-Si（150 μm） interface has been investigated.This occurred in the process of depositing indium tin oxide（ITO） film onto the silicon substrate by magnetron sputtering.We observe that this damage is caused by energetic particles produced in the plasma（atoms,ions,and UV light）.The passivation quality and the variation on interface states of the SiO_x/c-Si system were mainly studied by using effective minority carrier lifetime（τ_（eff）） measurement as a potential evaluation.The results showed that the samples＇ τ_（eff）was reduced by more than 90%after ITO formation,declined from 107 μs to 5 μs.Following vacuum annealing at 200 ℃,the τ_（eff） can be restored to 30 μs.The components of Si to O bonding states at the SiO_x/c-Si interface were analyzed by x-ray photoelectron spectroscopy（XPS） coupled with depth profiling.The amorphous phase of the SiO_x layer and the ＂atomistic interleaving structure＂ at the SiO_x/c-Si interface was observed by a transmission electron microscope（TEM）.The chemical configuration of the Si-O fraction within the intermediate region is the main reason for inducing the variation of Si dangling bonds（or interface states） and effective minority carrier lifetime.After an appropriate annealing,the reduction of the Si dangling bonds between SiO_x and near the c-Si surface is helpful to improve the passivation effect.

A review on plasmonic enhancement of activity and selectivity in electrocatalytic CO_(2)reduction

Utilizing plasmonic effects to assist electrochemical reactions exhibits a huge potential in tuning the reaction activities and product selectivity,which is most appealing especially in chemical reactions with multiple products,such as CO_(2)reduction reaction(CO_(2)RR).However,a comprehensive review of the development and the underlying mechanisms in plasmon-assisted electrocatalytic CO_(2)RR remains few and far between.Herein,the fundamentals of localized surface plasmonic resonance(LSPR)excitation and the properties of typical plasmonic metals(including Au,Ag,and Cu)are retrospected.Subsequently,the potential mechanisms of plasmonic effects(such as hot carrier effects and photothermal effects)on the reaction performance in the field of plasmon-assisted electrocatalytic CO_(2)RR are summarized,which provides directions for the future development of this field.It is concluded that plasmonic catalysts exhibit potential capabilities in enhancing CO_(2)RR while more in situ techniques are essential to further clarify the inner mechanisms.

First-principle high-throughput calculations of carrier effective masses of two-dimensional transition metal dichalcogenides

Two-dimensional group-VIB transition metal dichalcogenides（with the formula of MX2） emerge as a family of intensely investigated semiconductors that are promising for both electronic（because of their reasonable carrier mobility） and optoelectronic（because of their direct band gap at monolayer thickness） applications. Effective mass is a crucial physical quantity determining carriers transport, and thus the performance of these applications. Here we present based on first-principles high-throughput calculations a computational study of carrier effective masses of the two-dimensional MX2 materials. Both electron and hole effective masses of different MX2（M = Mo, W and X = S, Se, Te）, including in-layer/out-of-layer components, thickness dependence, and magnitude variation in heterostructures, are systemically calculated. The numerical results, chemical trends, and the insights gained provide useful guidance for understanding the key factors controlling carrier effective masses in the MX2 system and further engineering the mass values to improve device performance.

Effect of carrier screening on ZnO-based resistive switching memory devices

The carrier screening effect occurs commonly in dielectric materials. It reduces the electric potential gradient, thus negatively affecting the functionality of resistive random access memory （RRAM） devices. An Au/ZnO film/Al-doped ZnO device fabricated in this work exhibited no resistive switching （RS）, which was attributed to the carrier screening effect. Therefore, annealing was used for alleviating the screening effect, significantly enhancing the RS property. In addition, different on/off ratios were obtained for various bias values, and the screening effect was accounted for by investigating electron transport mechanisms. Furthermore, different annealing temperatures were employed to modulate the free carrier concentration in ZnO films to alleviate the screening effect. The maximal on/off ratio reached 10s at an annealing temperature of 600 ℃, yielding the lowest number of free carriers and the weakest screening effect in ZnO films. This work investigates the screening effect in RS devices. The screening effect not only modulates the characteristics of memory devices but also provides insight into the mechanism of RS in these devices.

Hot carrier effects of SOI NMOS

Hot carrier effect（HCE） is studied on annular NMOS and two-edged NMOS such as H-shape gate NMOS, T-shape gate NMOS and common two-edged NMOS.Based on the chemical reaction equation of HCE degradation and a geometry dependent reaction diffusion equation,a HCE degradation model for annular NMOS and two-edged NMOS is proposed.According to this model,we conclude that the time exponent of the threshold voltage degradation depends on the configuration of the gate,and annular NMOS has more serious HCE degradation than two-edged NMOS.The design,fabrication and HCE experiments of these NMOS in a 0.5-μm PD SOI process verify the correctness of the conclusion.