The Driftless Electromigration Theory(Diffusion-Generation-Recombination-Trapping Theory)

Electromigration is the transport of atoms in metal conductors at high electronic current-densities which creates voids in the conductors and increases the conductors＇ electrical resistance. It was delineated in 1961 by Huntington; then modeled by the empirical electrical resistance formula derived by Black in 1969 to fit the dependences of the experimental electrical resistance and failure data on the electrical current density and temperature. Tan in 2007 reviewed 40-years＇ ap- plications of the empirical Black formula to conductor lines interconnecting transistors and other devices in silicon integrated circuits. Since the first Landauer theory in 1957,theorists have attempted for 50 years to justify the drift force or electron momentum transfer assumed by Black as some electron-wind force to impart on the metal atoms and ions to move them. Landauer concluded in 1989 that the electron wind force is untenable even considering the most fundamental and complete many-body quantum transport theory. A driftless or electron-windless atomic void model for metal conductor lines is reviewed in this article. It was developed in the mid-1980 and described in 1996 by Sah in a homework solution. This model accounts for all the current and temperature dependences of experimental resistance data fitted to the empiri- cal Black formula. Exact analytical solutions were obtained for the metal conductor line resistance or current, R （t）/R （0） = J（t）/J（0） = [1-2（t/τα）^1/α]^-1/2 ,in the bond-breaking limit with α = 1 to 2 and diffusion limit with α = 2 to 4,from low to high current densities, where τα is the characteristic time constant of the mechanism, containing bond breaking and diffusion rates and activation energies of the metal.

Electromigration induced microstructure evolution and damage in asymmetric Cu/Sn-58Bi/Cu solder interconnect under current stressing

The electromigration induced microstructure evolution and damage in asymmetric Cu/Sn-58Bi/Cu solder interconnects were investigated by in-situ SEM observation, focused ion beam （FIB） microanalysis and finite element （FE） simulation. The SEM results show that the electromigration-induced local degradation of microstructures, i.e., segregation of Bi-rich phase and formation of microcracks, in the asymmetric solder interconnects is much severer than that in the symmetrical ones. FIB-SEM microanalysis reveals that the microregional heterogeneity in electrical resistance along different electron flowing paths is the key factor leading to non-uniform current distribution and the resultant electromigration damage. Theoretical analysis and FE simulation results manifest that the current crowding easily occurs at the local part with smaller resistance in an asymmetric solder interconnect. All results indicate that the asymmetric shape of the solder interconnect brings about the difference of the electrical resistance between the different microregions and further results in the severe electromigration damage.

A theoretical analysis of the electromigration-induced void morphological evolution under high current density

In this work, analysis of electromigration-induced void morphological evolution in solder interconnects is performed based on mass diffusion theory. The analysis is conducted for three typical experimentally observed void shapes: circular, ellipse, and cardioid. Void morphological evolution is governed by the competition between the electric field and surface capillary force. In the developed model, both the electric field and capillary force on the void's surface are solved analytically. Based on the mass conversation principle, the normal velocity on the void surface during diffusion is obtained. The void morphological evolution behavior is investigated, and a physical model is developed to predict void collapse to a crack or to split into sub-voids under electric current. It is noted that when the electric current is being applied from the horizontal direction, a circular void may either move stably along the electric current direction or collapse to a finger shape, depending on the relative magnitude of the electric current and surface capillary force. However, the elliptical-shaped void will elongate along the electric current direction and finally collapse to the finger shape. On the other hand, the cardioid-shaped void could bifurcate into two sub-voids when the electric current reaches a critical value. The theoretical predictions agree well with the experimental observations.

Effect of Interconnect Linewidth on Evolution of Intragranular Microcracks Due to Electromigration Analyzed by Finite Element Method

The effect of interconnect linewidth on the evolution of intragranular microcracks due to surface diffusion induced by electromigration is analyzed by finite element method.The numerical results indicate that there exists critical values of the linewidth hc,the electric fieldχc and the aspect ratioβc.When h>hc,χ<χc orβ<βc,the microcrack will evolve into a stable shape as it migrates along the interconnect line.When h≤hc,χ≥χc orβ≥βc,the microcrack will split into two smaller microcracks.The critical electric field,the critical aspect ratio and the splitting time have a stronger dependence on the linewidth when h≤6.In addition,the decrease of the linewidth,the increase of the electric field or the aspect ratio is beneficial to accelerate microcrack splitting,which may delay the open failure of the interconnect line.

Effect of electromigration and isothermal aging on interfacial microstructure and tensile fracture behavior of SAC305/Cu solder joint

The Cu/Sn-3. OAg-0.5Cu/Cu butting solder joints were fabricated to investigate the evolution of the interfacial intertnetaUic compound （ IMC ） and the degradation of the tensile strength of solder joints under the effect of electromigration （ EM） and aging processes. Scanning electron microscopy（SEM） results indicated that the Cu6Sn5 interfacial IMC presented obvious asymmetrical growth with the increase of EM time under current density of l. 78 × 10^4 A/cm^2 at 100 ℃ , and the growth of anodic IMC presented a parabolic relationship with time while the cathodic IMC got thinner gradually. However, as for aging samples at 100℃ without current stressing, the Cu6Sn5 IMC presented a symmetrical growth with a slower rate than the anodic IMC of EM samples. The tensile results indicated that the tensile strength of the solder joints under current stress declined more drastic with time than the aging samples, and the fracture mode transformed from ductile fracture to brittle fracture quickly while the fracture mode of aging samples transformed from cup-cone shaped fracture to microporous gathering fracture in a slow way.

A comparison of electromigration failure of metal lines with fracture mechanics

Atoms constructing an interconnecting metal line in a semiconductor device are transported by electron flow in high density. This phenomenon is called electromigration, which may cause the line failure. In order to characterize the electromigration failure, a comparison study is carded out with some typical phenomena treated by fracture mechanics for thin and large structures. An example of thin structures, which have been treated by fracture mechanics, is silica opti- cal fibers for communication systems. The damage growth in a metal line by electromigration is characterized in compar- ison with the crack growth in a silica optical fiber subjected to static fatigue. Also a brief comparison is made between the electromigration failure and some fracture phenomena in large structures.

An energy approach to predict electromigration induced grain rotation under high current density

An energy approach is proposed to describe the electromigration induced grain rotation under high current density. The driving force is assumed to arise from the grain-boundary energy reduction and increase of the inner energy from the joule heating. Energy dissipates by the grain boundary diffusion under electromigration and viscous boundary sliding is considered. Based on the conservation of energy production and dissipation, an equilibrium equation is developed to predict the grain rotation rate analytically. It is recognized that the grain rotates with the reducing of electrical resistivity and inversely proportional to the grain length. The theoretical prediction is compared with the experimental data, which shows good accuracy on the rotation trend and the specific rotation rate.

Electromigration in eutectic SnAg solder reaction couples with various ambient temperatures and current densities

The electromigration behavior of eutectic SnAg solder reaction couples was studied at various temperature （25 and 120℃ when the current density was held constant at 104 A/cm^2 or 5×10^3 A/cm^2. Under the current density of 104 A/cm^2, scallop type Cu6Sn5 spalls and migrates towards the direction of electron flow at room ambient temperature （25℃）, but transforms to layer type Cu3Sn and leaves Kirkendall voids in it at high ambient temperature （120℃）. Under the current density of 5×10^3 A/cm^2 plus room ambient temperature, no obvious directional migration of metal atoms/ions is found. Instead, the thermal stress induced by mismatch of dissimilar materials causes the formation of superficial valley at both interfaces. However, when the ambient temperature increases to 120℃, the mobility of metal atoms/ions is enhanced, and then the grains rotate due to the anisotropic property of β-Sn.

Improved electromigration reliability of surface acoustic wave devices using Ti/Al-Mo/Ti/Al-Mo electrodes

In order to obtain both high electromigration （EM） reliability and free-dimensional control in high-frequency surface acoustic wave （SAW） devices, 4-layered Ti/Al-Mo/Ti/Al-Mo electrode films were investigated on 128° Y-X LiNbO3 substrates by sputtering deposition. The resuits indicated that the 4-layered films had an improved EM reliability compared to conventional Al-0.5wt.%Cu films. Their lifetime is approximately three times longer than that of the Al-0.5wt.%Cu films tested at a current density of 5 x 107 A/cm^2 and a temperature of 200℃. Moreover, the 4-layered films were easily etched in reactive ion etching and fine-dimensional control was realized during the pattern replication for high-frequency SAW devices. For the 4-layered films, an optimum Mo quantity and sputtering parameters were very significant for high EM reliability.

Current sustainability and electromigration of Pd,Sc and Y thin-films as potential interconnects

The progress on novel interconnects for carbon nanotube(CNT)-based electronic circuit is by far behind the remarkable development of CNT-field effect transistors.The Cu interconnect material used in current integrated circuits seems not applicable for the novel interconnects,as it requires electrochemical deposition followed by chemical-mechanical polishing.We report our experimental results on the failure current density,resistivity,electromigration effect and failure mechanism of patterned stripes of Pd,Sc and Y thin-films,regarding them as the potential novel interconnects.The Pd stripes have a failure current density of(8~10)×106 A/cm^2(MA/cm^2),and they are stable when the working current density is as much as 90% of the failure current density.However,they show a resistivity around 210 μΩ·cm,which is 20 times of the bulk value and leaving room for improvement.Compared to Pd,the Sc stripes have a similar resistivity but smaller failure current density of 4~5 MA/cm^2.Y stripes seem not suitable for interconnects by showing even lower failure current density than that of Sc and evidence of oxidation.For comparison,Au stripes of the same dimensions show a failure current density of 30 MA/cm^2 and a resistivity around 4 μΩ·cm,making them also a good material as novel interconnects.

A new model for electromigration grain boundary noise based on free volume

Grain boundary plays a key role in electromigration process of polycrystal interconnection. We take a free volume to represent a ＇vacancy-ion complex＇ as a function of grain boundary specific resistivity, and develop a new characterisation model for grain boundary noise. This model reveals the internal relation between the boundary scattering section and electromigration noise. Comparing the simulation result with our experimental result, we find the source as well as the form of noise change in the electromigration process. In order to describe the noise enhancement at grain boundary quantitatively, we propose a new parameter--grain boundary noise enhancement factor, which reflects that the grain boundary noise can characterise the electromigration damage sensitively.

Mechanism of improved electromigration reliability using Fe-Ni UBM in wafer level package

Fe-Ni films with compositions of 73 wt% of Ni and 45 wt% of Ni were used as under bump metallization （UBM） in wafer level chip scale package, and their reliability was evaluated through electromigration （EM） test compared with commercial Cu UBM. For Sn3.SAg0.7Cu（SAC）]Cu solder joints, voids had initiated at Cu cathode after 300 h and typical failures of depletion of Cu cathode and cracks were detected after 1000 h EM. While the SAC]Fe-Ni solder joints kept at a perfect condition without any failures after 1000 h EM. Moreover, the characteristic lifetime calculated by Weibull analysis for Fe-73Ni UBM （2121 h）, Fe-45Ni UBM （2340 h） were both over three folds to Cu UBM＇s （698 h）. The failure modes for Fe-Ni solder joints varied with the different growth behavior of intermetallic compounds （IMCs）, which can all be classified as the crack at the cathodic interface between solder and outer IMC layer. The atomic fluxes concerned cathode dissolution and crack initiation were analyzed. When Fe-Ni UBM was added, cathode dissolution was suppressed due to the low diffusivity of IMCs and opposite transferring direction to electron flow of Fe atoms. The smaller EM flux within solder material led a smaller vacancy flux in Fe-Ni solder joints, which can explain the delay of solder voids and cracks as well as the much longer lifetime under EM.

Improved resistance to electromigration and acoustomigration of Al interdigital transducers by Ni underlayer

The structure and morphology of A1 interdigital transducers as a function of Ni underlayer thickness were studied. The A1 （111） texture intensity increases first and then decreases as Ni underlayer thickness increases. 6-nm Ni underlayer results in the strongest A1 （111） texture with flattest surface, which exhibits almost 10 times longer life in electromigration measurement than those without Ni underlayer. 1.5 GHz surface acoustic wave filters fabri- cated with A1 film on 6-nm Ni underlayer also have improved power durability compared with those without Ni underlayer from 29.0 to 32.5 dBm. It is observed that those fine grains in the 6-nm Ni underlayer greatly enhance A1 （111） texture. Together with increased adhesion force, strong A1 （111） texture accounts for the improved resistance to electromigration and acoustomigration via the reduction of gains boundaries, resistivity, and fine grains at the interface, which is promising for high power surface acoustic wave filters.

Effect of Cobalt Doping on the Microstructure and Tensile Properties of Lead Free Solder Joint Subjected to Electromigration

Rapid Cu diffusion is one of the main causes of electromigration（EM） failure in lead-free solder joints.In this study, an effort has been made to investigate the detrimental effects of EM on microstructure and mechanical performance of solder joint by introducing Co nanoparticles（NP） doped flux at the interface between SAC305 solder and copper substrate. EM tests were conducted on un-doped SAC305 and Co-doped SAC305 solder joints for different time intervals, with the maximum duration of 1128 h. A DC current was applied to the both types of solder joints to achieve a current density of 1 × 104A/cm2. EM tests were performed in an oil bath maintained at a constant temperature of 80 °C. It is found that Codoped flux significantly reduced the formation of cracks and voids at the cathode interface. Co atoms entered into the lattice of Cu6Sn5 leading to the formation of（Cu, Co）6Sn5. This thermodynamically stabilized the interfacial intermetallic（IMC） layers both at the anode and cathode sides and suppressed the change in their thickness. The average anodic growth rate of（Cu, Co）6Sn5 interfacial IMC in the doped sample was about one order of magnitude lower compared with that of Cu6Sn5 in the un-doped samples.Co-NP also improved the tensile strength considerably before and after EM. The report suggests that the reliability of solder joint during EM can be improved by using Co-NP doped flux.

Different Diffusion Behavior of Cu and Ni Undergoing Liquidesolid Electromigration

The diffusion behavior of Cu and Ni atoms undergoing liquidesolid electromigration（L-S EM） was investigated using Cu/Sn/Ni interconnects under a current density of 5.0 103A/cm2 at 250℃. The flowing direction of electrons significantly influences the cross-solder interaction of Cu and Ni atoms, i.e., under downwind diffusion, both Cu and Ni atoms can diffuse to the opposite interfaces; while under upwind diffusion,Cu atoms but not Ni atoms can diffuse to the opposite interface. When electrons flow from the Cu to the Ni, only Cu atoms diffuse to the opposite anode Ni interface, resulting in the transformation of interfacial intermetallic compound（IMC） from Ni3Sn4into（Cu,Ni）6Sn5and further into [（Cu,Ni）6Sn5t Cu6Sn5], while no Ni atoms diffuse to the opposite cathode Cu interface and thus the interfacial Cu6Sn5 remained.When electrons flow from the Ni to the Cu, both Cu and Ni atoms diffuse to the opposite interfaces,resulting in the interfacial IMC transformation from initial Cu6Sn5into（Cu,Ni）6Sn5and further into[（Cu,Ni）6Sn5t（Ni,Cu）3Sn4] at the anode Cu interface while that from initial Ni3Sn4into（Cu,Ni）6Sn5and further into（Ni,Cu）3Sn4at the cathode Ni interface. It is more damaging with electrons flowing from the Cu to the Ni than the other way.

Inhibition of Electromigration in Eutectic SnBi Solder Interconnect by Plastic Prestraining

Plastic prestraining was applied to a solder interconnect to introduce internal defects such as dislocations in order to investigate the interaction of dislocations with electromigration damage. Above a critical prestrain, Bi interfacial segregation to the anode, a clear indication of electromigration damage in SnBi solder inter- connect, was effectively prevented. Such an inhibiting effect is apparently contrary to the common notion that dislocations often act as fast diffusion paths. It is suggested that the dislocations introduced by plastic prestraining acted as sinks for vacancies in the early stage of the electromigration process, but as the vacancies accumulated at the dislocations, climb of those dislocations prompted recovery of the deformed samples under current stressing, greatly decreasing the density of dislocation and vacancy in the solder, leading to slower diffusion of Bi atoms.

Electromigration-induced cracks in Cu/Sn_(3.5)Ag/Cu solder reaction couple at room temperature

Electromigration （EM） behavior of Cu/Sn3.5Ag/Cu solder reaction couple was investigated with a high current density of 5 × 10^3 A/cm^2 at room temperature. One dimensional structure, copper wire/solder ball/copper wire SRC was designed and fabricated to dissipate the Joule heating induced by the current flow. In addition, thermomigration effect was excluded due to the symmetrical structure of the SRC. The experimental results indicated that micro-cracks initially appeared near the cathode interface between solder matrix and copper substrate after 474 h current stressing. With current stressing time increased, the cracks propagated and extended along the cathode interface. It should be noted that the continuous Cu6Sn5 intermetallic compounds （IMCs） layer both at the anode and at the cathode remained their sizes. Interestingly, tiny cracks appeared at the root of some long columntype Cu6Sn5 at the cathode interface due to the thermal stress.

W-plug via electromigration in CMOS process

We analyze the failure mechanism of W-plug via electromigration made in a 0.5-μm CMOS SPTM process. Failure occurs at the top or bottom of a W-plug via. We design a series of via chains, whose size ranges from 0.35 to 0.55μm. The structure for the via electromigration test is a long via chain, and the layer in the via is Ti/TiN/W/TiN. Using a self-heated resistor to raise the temperature of the via chain allows the structure to be stressed at lower current densities, which does not cause significant joule heating in the plugs. This reduces the interaction between the plug and the plug contact resistance and the time-to-failure for the via chain. The lifetime of a W-plug via electromigration is on the order of 3×10^7S, i.e., far below the lifetime of metal electromigration. The study on W-plug via electromigraion in this paper is beneficial for wafer level reliability monitoring of the ultra-deep submicron CMOS multilayer metal interconnect process.

Energy variation in diffusive void nucleation induced by electromigration

An energy approach is proposed to describe electromigration induced void nucleation based on phase transformation theory.The chemical potential for an individual migrated atom is predicted by diffusion induced back stress equivalent principle.After determining the chemical potential for the dilfusing atoms,the Gibbs free energy controlling the void nucleation can be determined and the mass diffusion process is considered.The critical void radius and nucleation time are determined analytically when the Gibbs free energy approaches the extreme value.The theoretical predictions are compared with the experimental results from literatures and show good accuracy.The proposed model can also be applied to other diffusion induced damage processes such as thermomigration and stress migration.

Temperature-Aware Electromigration Analysis with Current-Tracking in Power Grid Networks

Electromigration(EM)is a severe reliability issue in power grid networks.The via array possesses special EM characteristics and suffers from Joule heating and current crowding,closely related to EM violations.In this study,a power grid EM analysis method was developed to solve temperature variation effects for the via array EM.The new method is based on the temperature-aware EM model,which considers the effects of self-heating and thermal coupling of interconnected lines in a power grid.According to the model,the proposed methodology introduces a locality-driven strategy and current tracking to perform full-chip EM assessment for multilayered power grids.The results show that temperature due to Joule heating indeed has significant impacts on the via EM failure.The results further demonstrate that the proposed method might reasonably improve efficiency while ensuring the accuracy of the analysis.