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Efficient FPGA implementation of AES 128 bit for IEEE 802.16e mobile WiMax standards
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作者 P. Rajasekar Dr. H. Mangalam 《Circuits and Systems》 2016年第4期371-380,共10页
In an advancement of communication field, wireless technology plays a predominant role in data transmission. In the timeline of wireless domain, Wi-Fi, Bluetooth, zigbee etc are some of the standards, which are being ... In an advancement of communication field, wireless technology plays a predominant role in data transmission. In the timeline of wireless domain, Wi-Fi, Bluetooth, zigbee etc are some of the standards, which are being used in today’s wireless medium. In addition, the WiMax is introduced by IEEE in IEEE 802.16 for long distance communication, specifically 802.16e standard for mobile WiMax. It is an acronym of Worldwide Interoperability for Microwave Access. It is to be deliver wireless transmission with high quality of service in a secured environment. Since, security becomes dominant design aspect of every communication, a new technique has been proposed in wireless environment. Privacy across the network and access control management is the goal in the predominant aspects in the WiMax protocol. Especially, MAC sub layer should be evaluated in the security architecture. It has been proposed on cryptography algorithm AES that require high cost. Under this scenario, we present the optimized AES 128 bit counter mode security algorithm for MAC layer of 802.16e standards. To design a efficient MAC layer, we adopt the modification of security layers data handling process. As per the efficient design strategy, the power and speed are the dominant factors in mobile device. Since we concentrate mobile WiMax, efficient design is needed for MAC Security layer. Our proposed model incorporates the modification of AES algorithm. The design has been implemented in Xilinx virtex5 device and power has been analyzed using XPower analyzer. This proposed system consumes 41% less power compare to existing system. 展开更多
关键词 DECRYPTION FPGA implementation electronic code book mode Galois Field Low Power Architecture : AES encryption
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Robust digital receiver for EPC sensor network 被引量:1
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作者 Cheng Jin Sung Ho Cho 《Journal of Systems Engineering and Electronics》 SCIE EI CSCD 2013年第1期44-51,共8页
A robust digital receiver based on a matched filter (MF) is proposed for the radio frequency identification (RFID) reader system to enhance the reliability of signal processing in the electronic product code (EPC... A robust digital receiver based on a matched filter (MF) is proposed for the radio frequency identification (RFID) reader system to enhance the reliability of signal processing in the electronic product code (EPC) sensor network (ESN). The performance of the proposed receiver is investigated by examining the anti-collision algorithm in the EPC global Class1 Generation2 protocol. The validity and usefulness are demonstrated by both computer simulations and experiments. Based on the verification results, comparing with the conventional zero crossing detector (ZCD) based receiver, the proposed receiver is very robust against strong amplitude distortions and considerable frequency deviations happening on the backscattered signal from a passive tag. 展开更多
关键词 electronic product code (EPC) sensor network (ESN) signal distortion matched filter radio frequency identification (RFID) receiver.
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