Being different from testing for popular GUI software, the “instruction-category” approach is proposed for testing embedded system. This approach is constructed by three steps including refining items, drawing instr...Being different from testing for popular GUI software, the “instruction-category” approach is proposed for testing embedded system. This approach is constructed by three steps including refining items, drawing instruction-brief and instruction-category, and constructing test suite. Consequently, this approach is adopted to test oven embedded system, and detail process is deeply discussed. As a result, the factual result indicates that the “instruction-category” approach can be effectively applied in embedded system testing as a black-box method for conformity testing.展开更多
As the proportion of renewable energy increases, the interaction between renewable energy devices and the grid continues to enhance. Therefore, the renewable energy dynamic test in a power system has become more and m...As the proportion of renewable energy increases, the interaction between renewable energy devices and the grid continues to enhance. Therefore, the renewable energy dynamic test in a power system has become more and more important. Traditional dynamic simulation systems and digital-analog hybrid simulation systems are difficult to compromise on the economy, flexibility and accuracy. A multi-time scale test system of doubly fed induction generator based on FPGA+ CPU heterogeneous calculation is proposed in this paper. The proposed test system is based on the ADPSS simulation platform. The power circuit part of the test system is setup up using the EMT(electromagnetic transient simulation) simulation, and the control part uses the actual physical devices. In order to realize the close-loop testing for the physical devices, the power circuit must be simulated in real-time. This paper proposes a multi-time scale simulation algorithm, in which the decoupling component divides the power circuit into a large time scale system and a small time scale system in order to reduce computing effort. This paper also proposes the FPGA+CPU heterogeneous computing architecture for implementing this multitime scale simulation. In FPGA, there is a complete small time-scale EMT engine, which support the flexibly circuit modeling with any topology. Finally, the test system is connected to an DFIG controller based on Labview to verify the feasibility of the test system.展开更多
Dynamically reconfigurable Field Programmable Gate Array(dr-FPGA) based electronic systems on board mission-critical systems are highly susceptible to radiation induced hazards that may lead to faults in the logic or ...Dynamically reconfigurable Field Programmable Gate Array(dr-FPGA) based electronic systems on board mission-critical systems are highly susceptible to radiation induced hazards that may lead to faults in the logic or in the configuration memory. The aim of our research is to characterize self-test and repair processes in Fault Tolerant(FT) dr-FPGA systems in the presence of environmental faults and explore their interrelationships. We develop a Continuous Time Markov Chain(CTMC) model that captures the high level fail-repair processes on a dr-FPGA with periodic online Built-In Self-Test(BIST) and scrubbing to detect and repair faults with minimum latency. Simulation results reveal that given an average fault interval of 36 s, an optimum self-test interval of 48.3 s drives the system to spend 13% of its time in self-tests, remain in safe working states for 76% of its time and face risky fault-prone states for only 7% of its time. Further, we demonstrate that a well-tuned repair strategy boosts overall system availability, minimizes the occurrence of unsafe states, and accommodates a larger range of fault rates within which the system availability remains stable within 10% of its maximum level.展开更多
文摘Being different from testing for popular GUI software, the “instruction-category” approach is proposed for testing embedded system. This approach is constructed by three steps including refining items, drawing instruction-brief and instruction-category, and constructing test suite. Consequently, this approach is adopted to test oven embedded system, and detail process is deeply discussed. As a result, the factual result indicates that the “instruction-category” approach can be effectively applied in embedded system testing as a black-box method for conformity testing.
基金supported by the State Grid Science and Technology Project (Title: Technology Research On Large Scale EMT Real-time simulation customized platform, FX71-17-001)
文摘As the proportion of renewable energy increases, the interaction between renewable energy devices and the grid continues to enhance. Therefore, the renewable energy dynamic test in a power system has become more and more important. Traditional dynamic simulation systems and digital-analog hybrid simulation systems are difficult to compromise on the economy, flexibility and accuracy. A multi-time scale test system of doubly fed induction generator based on FPGA+ CPU heterogeneous calculation is proposed in this paper. The proposed test system is based on the ADPSS simulation platform. The power circuit part of the test system is setup up using the EMT(electromagnetic transient simulation) simulation, and the control part uses the actual physical devices. In order to realize the close-loop testing for the physical devices, the power circuit must be simulated in real-time. This paper proposes a multi-time scale simulation algorithm, in which the decoupling component divides the power circuit into a large time scale system and a small time scale system in order to reduce computing effort. This paper also proposes the FPGA+CPU heterogeneous computing architecture for implementing this multitime scale simulation. In FPGA, there is a complete small time-scale EMT engine, which support the flexibly circuit modeling with any topology. Finally, the test system is connected to an DFIG controller based on Labview to verify the feasibility of the test system.
文摘Dynamically reconfigurable Field Programmable Gate Array(dr-FPGA) based electronic systems on board mission-critical systems are highly susceptible to radiation induced hazards that may lead to faults in the logic or in the configuration memory. The aim of our research is to characterize self-test and repair processes in Fault Tolerant(FT) dr-FPGA systems in the presence of environmental faults and explore their interrelationships. We develop a Continuous Time Markov Chain(CTMC) model that captures the high level fail-repair processes on a dr-FPGA with periodic online Built-In Self-Test(BIST) and scrubbing to detect and repair faults with minimum latency. Simulation results reveal that given an average fault interval of 36 s, an optimum self-test interval of 48.3 s drives the system to spend 13% of its time in self-tests, remain in safe working states for 76% of its time and face risky fault-prone states for only 7% of its time. Further, we demonstrate that a well-tuned repair strategy boosts overall system availability, minimizes the occurrence of unsafe states, and accommodates a larger range of fault rates within which the system availability remains stable within 10% of its maximum level.
