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Markov Model for Packet Scheduling in the Transmission of Streaming Media
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作者 潘浩 宋瀚涛 王大震 《Journal of Beijing Institute of Technology》 EI CAS 2003年第4期446-449,共4页
The difficulties in the transmission of streaming media are analyzed, the packet scheduling on the streaming media server is studied. A Markov model is proposed under the effect of the complex dependency among the str... The difficulties in the transmission of streaming media are analyzed, the packet scheduling on the streaming media server is studied. A Markov model is proposed under the effect of the complex dependency among the streaming media packets and the parameters of the transmission channel. On the basis of the Markov model, a policy is made to queue the streaming media packets in the sending buffer by using the iteration method, which can optimize the playback quality under the lack of the channel bandwidth. 展开更多
关键词 Markov model quality of service retransmission technology layered encoding
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A 0.18μm CMOS transmit physical coding sublayer IC for 100G Ethernet 被引量:1
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作者 阮伟华 胡庆生 《Journal of Semiconductors》 EI CAS CSCD 2016年第3期103-109,共7页
This paper presents a transmit physical coding sublayer(PCS) circuit for 100 G Ethernet. Based on the4×25 Gb/s architecture according to the IEEE P802.3ba and IEEE P802.3bm-(TM)/D1.1 standards, this PCS circu... This paper presents a transmit physical coding sublayer(PCS) circuit for 100 G Ethernet. Based on the4×25 Gb/s architecture according to the IEEE P802.3ba and IEEE P802.3bm-(TM)/D1.1 standards, this PCS circuit is designed using a semi-custom design method and consists of 4 modules including 64B/66 B encoder, scrambler,multiple lanes distribution and 66 : 8 gearbox. By using the pipeline structure and several optimization techniques,the working speed of the circuit is increased significantly. The parallel scrambling combined with logic optimization also improve the performance. In addition, a kind of phase-independent structure is employed in the design of the gearbox to ensure it can work stably and reliably at high frequency. This PCS circuit has been fabricated based on0.18μm CMOS technology and the total area is 1.7×1.7 mm^2. Measured results show that the circuit can work properly at 100 Gb/s and the power consumption is about 284 m W with a 1.8 V supply. 展开更多
关键词 100GbE PCS layer 64B/66B encoder scrambler gearbox
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