CANONICAL PIECEWISE-LINEAR ANALYSIS FOR NONLINEAR DC FAULT CIRCUITS

This paper uses canonical piecewise-linear analysis method to analyze nonlinear DC fault circuitsand solve for the values of the test port voltages which are selected beforehand .The method needs lessmemory storages,obtains the results in finite steps and has high efficiency in computation.It can be appliedto the circuits containing multiport nonlinear elements.It is a good method of pre-test analysis for fault cir-cuits in simulation-before-test aproach in analogue circuit diagnosis.

fault500 kV变电站35 kV串联电抗器故障分析及建议

某500kV变电站主变35kV侧发生一起电容器组串联电抗器短路故障,通过对事故现场检查,结合故障录波器记录,对本次事故发生的过程进行了分析并得出结论。针对本次故障暴露出的问题,从串联电抗器安装位置、在线监测等方面提出了事故防范措施,对于变电站电容器组安全运行具有一定参考价值。

Wavelet neural network based fault diagnosis in nonlinear analog circuits

The theories of diagnosing nonlinear analog circuits by means of the transient response testing are studied. Wavelet analysis is made to extract the transient response signature of nonlinear circuits and compress the signature dada. The best wavelet function is selected based on the between-category total scatter of signature. The fault dictionary of nonlinear circuits is constructed based on improved back-propagation(BP) neural network. Experimental results demonstrate that the method proposed has high diagnostic sensitivity and fast fault identification and deducibility.

Particle swarm optimization based RVM classifier for non-linear circuit fault diagnosis

A relevance vector machine (RVM) based fault diagnosis method was presented for non-linear circuits. In order to simplify RVM classifier, parameters selection based on particle swarm optimization (PSO) and preprocessing technique based on the kurtosis and entropy of signals were used. Firstly, sinusoidal inputs with different frequencies were applied to the circuit under test (CUT). Then, the resulting frequency responses were sampled to generate features. The frequency response was sampled to compute its kurtosis and entropy, which can show the information capacity of signal. By analyzing the output signals, the proposed method can detect and identify faulty components in circuits. The results indicate that the fault classes can be classified correctly for at least 99% of the test data in example circuit. And the proposed method can diagnose hard and soft faults.

Testing Cross-Talk Induced Delay Faults in Digital Circuit Based on Transient Current Analysis

The delay fault induced by cross-talk effect is one of the difficult problems in the fault diagnosis of digital circuit. An intelligent fault diagnosis based on IDDT testing and support vector machines （SVM） classifier was proposed in this paper. Firstly, the fault model induced by cross-talk effect and the IDDT testing method were analyzed, and then a delay fault localization method based on SVM was presented. The fault features of the sampled signals were extracted by wavelet packet decomposition and served as input parameters of SVM classifier to classify the different fault types. The simulation results illustrate that the method presented is accurate and effective, reaches a high diagnosis rate above 95%.

Feature evaluation and extraction based on neural network in analog circuit fault diagnosis

Choosing the right characteristic parameter is the key to fault diagnosis in analog circuit. The feature evaluation and extraction methods based on neural network are presented. Parameter evaluation of circuit features is realized by training results from neural network; the superior nonlinear mapping capability is competent for extracting fault features which are normalized and compressed subsequently. The complex classification problem on fault pattern recognition in analog circuit is transferred into feature processing stage by feature extraction based on neural network effectively, which improves the diagnosis efficiency. A fault diagnosis illustration validated this method.

Data-driven fault diagnosis method for analog circuits based on robust competitive agglomeration

The data-driven fault diagnosis methods can improve the reliability of analog circuits by using the data generated from it. The data have some characteristics, such as randomness and incompleteness, which lead to the diagnostic results being sensitive to the specific values and random noise. This paper presents a data-driven fault diagnosis method for analog circuits based on the robust competitive agglomeration （RCA）, which can alleviate the incompleteness of the data by clustering with the competing process. And the robustness of the diagnostic results is enhanced by using the approach of robust statistics in RCA. A series of experiments are provided to demonstrate that RCA can classify the incomplete data with a high accuracy. The experimental results show that RCA is robust for the data needed to be classified as well as the parameters needed to be adjusted. The effectiveness of RCA in practical use is demonstrated by two analog circuits.

Analysis on the fault characteristics of three-phase short-circuit for half-wavelength AC transmission lines

Half-wavelength AC transmission(HWACT) is an ultra-long distance AC transmission technology, whose electrical distance is close to half-wavelength at the system power frequency. It is very important for the construction and operation of HWACT to analyze its fault features and corresponding protection technology. In this paper, the steady-state voltage and current characteristics of the bus bar and fault point and the steady-state overvoltage distribution along the line will be analyzed when a three-phase symmetrical short-circuit fault occurs on an HWACT line. On this basis, the threephase fault characteristics for longer transmission lines are also studied.

Particle Swarm Optimization-Support Vector Machine Model for Machinery Fault Diagnoses in High-Voltage Circuit Breakers

According to statistic data,machinery faults contribute to largest proportion of High-voltage circuit breaker failures,and traditional maintenance methods exist some disadvantages for that issue.Therefore,based on the wavelet packet decomposition approach and support vector machines,a new diagnosis model is proposed for such fault diagnoses in this study.The vibration eigenvalue extraction is analyzed through wavelet packet decomposition,and a four-layer support vector machine is constituted as a fault classifier.The Gaussian radial basis function is employed as the kernel function for the classifier.The penalty parameter c and kernel parameterδof the support vector machine are vital for the diagnostic accuracy,and these parameters must be carefully predetermined.Thus,a particle swarm optimizationsupport vector machine model is developed in which the optimal parameters c andδfor the support vector machine in each layer are determined by the particle swarm algorithm.The validity of this fault diagnosis model is determined with a real dataset from the operation experiment.Moreover,comparative investigations of fault diagnosis experiments with a normal support vector machine and a particle swarm optimization back-propagation neural network are also implemented.The results indicate that the proposed fault diagnosis model yields better accuracy and e-ciency than these other models.

FAULT DETECTION FOR MULTIPLE-VALUED LOGIC CIRCUITS WITH FANOUT-FREE

The single fault and multiple fault detections for multiple-valued logic circuits are studied in this paper. Firstly, it is shown that the cardinality of optimal single fault test set for fanout-free m-valued circuits with n primary inputs is not more than n + 1, for linear tree circuits is two, and for multiplication modulo circuits is two if n is an odd number or if n is an even number and m ＞ 3, where the optimal test set of a circuit has minimal number of test vectors. Secondly,it is indicated that the cardinality of optimal multiple fault test set for linear tree circuits with n primary inputs is 1 + [n/(m - 1)], for multiplication modulo circuits is n+ 1, for fanout-free circuits that consist of 2-input linear tree circuits and 2-input multiplication modulo circuits is not greater than n+ 1, where [x] denotes the smallest integer greater than or equal to x. Finally,the single fault location approaches of linear tree circuits and multiplication modulo circuits are presented, and all faults in the two types of circuits can be located by using a test set with n + 1 vectors.

Improved RBF network application in analog circuit fault isolation

One kind of steepest descent incremental projection learning algorithm for improving the training of radial basis function(RBF)neural network is proposed,which is applied to analog circuit fault isolation.This algorithm simplified the structure of network through optimum output layer coefficient with incremental projection learning(IPL)algorithm,and adjusted the parameters of the neural activation function to control the network scale and improve the network approximation ability.Compared to the traditional algorithm,the improved algorithm has quicker convergence rate and higher isolation precision.Simulation results show that this improved RBF network has much better performance,which can be used in analog circuit fault isolation field.

A Fault Current Limiting Hybrid DC Circuit Breaker

Due to the low impedance characteristic of the high voltage direct current(HVDC)grid,the fault current rises extremely fast after a DC-side fault occurs,and this phenomenon seriously endangers the safety of the HVDC grid.In order to suppress the rising speed of the fault current and reduce the current interruption requirements of the main breaker(MB),a fault current limiting hybrid DC circuit breaker(FCL-HCB)has been proposed in this paper,and it has the capability of bidirectional fault current limiting and fault current interruption.After the occurrence of the overcurrent in the HVDC grid,the current limiting circuit(CLC)of FCL-HCB is put into operation immediately,and whether the protected line is cut off or resumed to normal operation is decided according to the fault detection result.Compared with the traditional hybrid DC circuit breaker(HCB),the required number of semiconductor switches and the peak value of fault current after fault occurs are greatly reduced by adopting the proposed device.Extensive simulations also verify the effectiveness of the proposed FCL-HCB.

A FAULT DETECTION SENSOR FOR CIRCUIT AGING USING DOUBLE-EDGE-TRIGGERED FLIP-FLOP

In nanoscale technology, transistor aging is one of the most critical problems that impact on the reliability of circuits. Aging sensor is a good online way to detect the circuit aging, which performs during the operating time with no influence of the normal operation of circuits. In this paper, a Double-edge-triggered Detection Sensor for circuit Aging (DSDA) is proposed, which employs data signal of logic circuits as its clock to control the sampling process. The simulation is done by Hspice using 45 nm technology. The results show that this technique is not sensitive to the process variations. The worst case of the detection precision is more than 80% under the different process variations. It can detect aging fault effectively with the 8% power cost and 30% performance cost.

Combinatorial Optimization Based Analog Circuit Fault Diagnosis with Back Propagation Neural Network

Electronic components' reliability has become the key of the complex system mission execution. Analog circuit is an important part of electronic components. Its fault diagnosis is far more challenging than that of digital circuit. Simulations and applications have shown that the methods based on BP neural network are effective in analog circuit fault diagnosis. Aiming at the tolerance of analog circuit,a combinatorial optimization diagnosis scheme was proposed with back propagation( BP) neural network( BPNN).The main contributions of this scheme included two parts:( 1) the random tolerance samples were added into the nominal training samples to establish new training samples,which were used to train the BP neural network based diagnosis model;( 2) the initial weights of the BP neural network were optimized by genetic algorithm( GA) to avoid local minima,and the BP neural network was tuned with Levenberg-Marquardt algorithm( LMA) in the local solution space to look for the optimum solution or approximate optimal solutions. The experimental results show preliminarily that the scheme substantially improves the whole learning process approximation and generalization ability,and effectively promotes analog circuit fault diagnosis performance based on BPNN.

Analog circuit intelligent fault diagnosis based on GKPCA and multi-class SVM approach

Analog circuits fault diagnosis is essential for guaranteeing the reliability and maintainability of electronic systems. In this paper, a novel analog circuit fault diagnosis approach is proposed based on greedy kernel principal component analysis (KPCA) and one-against-all support vector machine (OAASVM). In order to obtain a successful SVM-based fault classifier, eliminating noise and extracting fault features are very important. Due to the better performance of nonlinear fault features extraction and noise elimination as compared with PCA, KPCA is adopted in the proposed approach. However, when we adopt KPCA to extract fault features of analog circuit, a drawback of KPCA is that the storage required for the kernel matrix grows quadratically, and the computational cost for eigenvector of the kernel matrix grows linearly with the number of training samples. Therefore, GKPCA, which can approximate KPCA with small representation error, is introduced to enhance computational efficiency. Based on the statistical learning theory and the empirical risk minimization principle, SVM has advantages of better classification accuracy and generalization performance. The extracted fault features are then used as the inputs of OAASVM to solve fault diagnosis problem. The effectiveness of the proposed approach is verified by the experimental results.

Robust Fault Diagnosis of Analog Circuits with Tolerances

A method for robust analog fault diagnosis using hybrid neural networks is proposed. The primary focus of the paper is to provide robust diagnosis using a mechanism to deal with the problem of element tolerances and reduce testing time. The proposed approach is based on the fault dictionary diagnosis method and backward propagation neural network (BPNN) and the adaptive resonance theory (ART) neural network. Simulation results show that the method is robust and fast for fault diagnosis of analog circuits with tolerances.

A Neural-based L1-Norm Optimization Approach for Fault Diagnosis of Nonlinear Resistive Circuits

This paper deals with fault isolation in nonlinear analog circuits with tolerance under an insufficient number of independent voltage measurements.A neural network-based L1-norm optimization approach is proposed and utilized in locating the most likely faulty elements in nonlinear circuits.The validity of the proposed method is verified by both extensive computer simulations and practical examples.One simulation example is presented in the paper.

Research method of circuit fault diagnosis based on FCM

Using fuzzy C cluster mean (FCM), fuzzy theory and neural network, a fault diagnosis method was proposed, which was based on fuzzy C-means clustering algorithm of neural network that was applied in non-linear analog circuits and in diagnoses the ARNIC 429 reception circuit of aviation aircraft avionics. The C cluster algorithm can make the amount of the fuzzy rule automatically and can create an initial fuzzy rule database of fault diagnosis. A type of fuzzy neural network and a fault tree were generated. The algorithm avoids the disadvantage that gets into the part of optimum circumstance. A validate application was implemented, which proves that the method is effective. Therefore, the method is superior to the traditional methods in fault diagnosis, and the efficiency is heavily improved.

THE EFFECTIVE RANGE OF K-FAULT DIAGNOSIS OF-LINEAR CIRCUITS

In view of K-fault testability,the topological construction of a practical circuitis far from ideal.In order to improve the testability of a circuit,we may increase the numberof accessible nodes or use the multi-excitation method.Effectiveness of these methods and thefeasibility of choosing accessible nodes are discussed in detail.The conditions for multi-excitationtestability are presented.

Short-circuit fault analysis and isolation strategy for matrix converters

The behavior of matrix converter(MC) drive systems under the condition of MC short-circuit faults is comprehensively investigated. Two isolation strategies using semiconductors and high speed fuses(HSFs) for MC short-circuit faults are examined and their performances are compared. The behavior of MC drive systems during the fuse action time under different operating conditions is explored. The feasibility of fault-tolerant operation during the fuse action time is also studied. The basic selection laws for the HSFs and the requirements for the passive components of the MC drive system from the point view of short-circuit faults are also discussed. Simulation results are used to demonstrate the feasibility of the proposed isolation strategies.