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Parallel Critical Path Tracing——A Fault Simulation Algorithm for Combinational Circuits
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作者 魏道政 《Journal of Computer Science & Technology》 SCIE EI CSCD 1990年第2期156-163,共8页
Critical path tracing,a fault simulation method for gate-level combinational circuits,is extended to theparallel critical path tracing for functional block-level combinational circuits.If the word length of the hostco... Critical path tracing,a fault simulation method for gate-level combinational circuits,is extended to theparallel critical path tracing for functional block-level combinational circuits.If the word length of the hostcomputer is m,then the parallel critical path tracing will be approximately m times faster than the originalone. 展开更多
关键词 A fault Simulation Algorithm for combinational Circuits Parallel Critical Path Tracing PATH SIMULATION
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