Comparative analysis between chaotic sequence and PN sequence in spread spectrum system

This paper introduces two kinds of sequences used in spread spectrum communication system： pseudo-noise （PN） se-quence generated by linear feedback shift register（LFSR）, such as m-sequence and Gold sequence, and the chaotic sequence generated by the determination of the nonlinear system. The characteristics of PN sequence and chaotic sequence are analyzed by simulation, and the advantages and disadvantages of different sequences in spread spectrum communication system are ob-tained. The advantages of sequence can be used to improve signal transmission in a spread spectrum communication system.

AUTOCORRELATIONS OF l-SEQUENCES WITH CERTAIN SHIFTS

In this paper, the autocorrelations of maximal period Feedback with Carry Shift Register sequences （l-sequences） are discussed. For an l-sequence a with connection integer q = p^e（e ≥ 2） and period T = p^t-1（p- 1）, and for any integer i, 1 ≤ i ≤ e/2, by calculating the number of certain sets, it is shown that the autocorrelation of a with shift τ= kT/2p^i is Ca（τ） =（-1）^k-1 T/p^2i-1, where 1 ≤ k ≤ 2p^i - 1, and gcd（k,2p^i） = 1. This result shows there do exist some shifts such that the autocorrelations of l-sequences are high although most autocorrelations are low. Such result also holds for the decimations of l-sequences.

LOW-POWER SURVIVOR MEMORY ARCHITECTURE FOR DFSE IN 1000BASE-T TRANSCEIVER

A novel approach to survivor memory unit of Decision Feedback Sequence Estimator(DFSE) for 1000BASE-T transceiver based on hybrid architecture of the classical register-exchange and trace-back methods is proposed.The proposed architecture is investigated with special emphasis on low power and small decoder latency,in which a dedicated register-exchange module is designed to provide tentative survivor symbols with zero latency,and a high-speed trace back logic is presented to meet the tight latency budget specified for 1000BASE-T transceiver.Furthermore,clock-gating register banks are constructed for power saving.VLSI implementation reveals that,the proposed architecture provides about 40% savings in power consumption compared to the traditional register-exchange architecture.

An Improved Robust Model Predictive Control Approach to Systems with Linear Fractional Transformation Perturbations

In this paper, a robust model predictive control approach is proposed for a class of uncertain systems with time-varying, linear fractional transformation perturbations. By adopting a sequence of feedback control laws instead of a single one, the control performance can be improved and the region of attraction can be enlarged compared with the existing model predictive control （MPC） approaches. Moreover, a synthesis approach of MPC is developed to achieve high performance with lower on-line computational burden. The effectiveness of the proposed approach is verified by simulation examples.