A ferroelectric memory diode consisting of Au/PZT/BIT/p-Si multilayer configuration has been fabricated by pulsed laser deposition (PLD) technique. The ferroelectric properties and the memory characteristics are inves...A ferroelectric memory diode consisting of Au/PZT/BIT/p-Si multilayer configuration has been fabricated by pulsed laser deposition (PLD) technique. The ferroelectric properties and the memory characteristics are investigated. The P-E curve of the PZT/BIT/p-Si films system had an asymmetry saturated hysteresis loop withP t=15 μC/cm2 andE c=48 kV/cm, and the decay in remanent polarization was only 10% after 109 switching cycles, meanwhile the increase in coercive field was 12%. The C-V hysteresis loop and the I-V curve showed a memory effect derived from the ferroelectric polarization of PZT/BIT films, and the current density was 6.7×10?8 A/cm2 at a voltage of +4V. Our diode had nonvolatile and nondestructive memory readout operation. There was a read current disparity of 0.05 μA for logic “1” and logic “0” at a read voltage of +2V, and the stored logical value (“1” or “0”) could be read out in 30 min.展开更多
基金This work was supported by the National Natural Science Foundation of China (Grant No. 69771024) the Natural Science Foundation of Hebei Province (Grant No. 98J026) .
文摘A ferroelectric memory diode consisting of Au/PZT/BIT/p-Si multilayer configuration has been fabricated by pulsed laser deposition (PLD) technique. The ferroelectric properties and the memory characteristics are investigated. The P-E curve of the PZT/BIT/p-Si films system had an asymmetry saturated hysteresis loop withP t=15 μC/cm2 andE c=48 kV/cm, and the decay in remanent polarization was only 10% after 109 switching cycles, meanwhile the increase in coercive field was 12%. The C-V hysteresis loop and the I-V curve showed a memory effect derived from the ferroelectric polarization of PZT/BIT films, and the current density was 6.7×10?8 A/cm2 at a voltage of +4V. Our diode had nonvolatile and nondestructive memory readout operation. There was a read current disparity of 0.05 μA for logic “1” and logic “0” at a read voltage of +2V, and the stored logical value (“1” or “0”) could be read out in 30 min.
