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Digital prototype of LLRF system for SSRF 被引量:3
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作者 赵玉彬 尹成科 +5 位作者 张同宣 付泽川 赵振堂 戴志敏 刘建飞 王芳 《Chinese Physics C》 SCIE CAS CSCD 北大核心 2008年第9期758-760,共3页
This paper describes a field programming gate array (FPGA) based low level radio frequency (LLRF) prototype for the SSRF storage ring RF system: This prototype includes the local oscillator (LO), analog front e... This paper describes a field programming gate array (FPGA) based low level radio frequency (LLRF) prototype for the SSRF storage ring RF system: This prototype includes the local oscillator (LO), analog front end, digital front end, RF out, clock distributing, digital signal processing and communication functions. All feedback algorithms are performed in FPGA. The long term of the test prototype with high power shows that the variations of the RF amplitude and the phase in the accelerating cavity are less than 1% and 1° respectively, and the variation of the cavity resonance frequency is controlled within 4-10 Hz. 展开更多
关键词 LLRF controller field programming gate array feedback algorithm clock distribution local oscillator
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