Effect of external magnetic field on the instability of THz plasma waves in nanoscale graphene field-effect transistors

The instability of plasma waves in the channel of field-effect transistors will cause the electromagnetic waves with THz frequency.Based on a self-consistent quantum hydrodynamic model,the instability of THz plasmas waves in the channel of graphene field-effect transistors has been investigated with external magnetic field and quantum effects.We analyzed the influence of weak magnetic fields,quantum effects,device size,and temperature on the instability of plasma waves under asymmetric boundary conditions numerically.The results show that the magnetic fields,quantum effects,and the thickness of the dielectric layer between the gate and the channel can increase the radiation frequency.Additionally,we observed that increase in temperature leads to a decrease in both oscillation frequency and instability increment.The numerical results and accompanying images obtained from our simulations provide support for the above conclusions.

Novel GaN-based double-channel p-heterostructure field-effect transistors with a p-GaN insertion layer

GaN-based p-channel heterostructure field-effect transistors(p-HFETs)face significant constraints on on-state currents compared with n-channel high electron mobility transistors.In this work,we propose a novel double heterostructure which introduces an additional p-GaN insertion layer into traditional p-HFETs.The impact of the device structure on the hole densities and valence band energies of both the upper and lower channels is analyzed by using Silvaco TACD simulations,including the thickness of the upper AlGaN layer and the doping impurities and concentration in the GaN buffer layer,as well as the thickness and Mg-doping concentration in the p-GaN insertion layer.With the help of the p-GaN insertion layer,the C-doping concentration in the GaN buffer layer can be reduced,while the density of the two-dimensional hole gas in the lower channel is enhanced at the same time.This work suggests that a double heterostructure with a p-GaN insertion layer is a better approach to improve p-HFETs compared with those devices with C-doped buffer layer alone.

Effect of spin on the instability of THz plasma waves in field-effect transistors under non-ideal boundary conditions

Terahertz(THz) radiation can be generated due to the instability of THz plasma waves in field-effect transistors(FETs). In this work, we discuss the instability of THz plasma waves in the channel of FETs with spin and quantum effects under non-ideal boundary conditions. We obtain a linear dispersion relation by using the hydrodynamic equation, Maxwell equation and spin equation. The influence of source capacitance, drain capacitance, spin effects, quantum effects and channel width on the instability of THz plasma waves under the non-ideal boundary conditions is investigated in great detail. The results of numerical simulation show that the THz plasma wave is unstable when the drain capacitance is smaller than the source capacitance;the oscillation frequency with asymmetric boundary conditions is smaller than that under non-ideal boundary conditions;the instability gain of THz plasma waves becomes lower under non-ideal boundary conditions. This finding provides a new idea for finding efficient THz radiation sources and opens up a new mechanism for the development of THz technology.

Heat dissipation enhancement method for finned heat sink for AGV motor driver's IGBT module

With the widespread use of high-power and highly integrated insulated gate bipolar transistor(IGBT),their cooling methods have become challenging.This paper proposes a liquid cooling scheme for heavy-duty automated guided vehicle(AGV)motor driver in port environment,and improves heat dissipation by analyzing and optimizing the core component of finned heat sink.Firstly,the temperature distribution of the initial scheme is studied by using Fluent software,and the heat transfer characteristics of the finned heat sink are obtained through numerical analysis.Secondly,an orthogonal test is designed and combined with the response surface methodology to optimize the structural parameters of the finned heat sink,resulting in a 14.57%increase in the heat dissipation effect.Finally,the effectiveness of heat dissipation enhancement is verified.This work provides valuable insights into improving the heat dissipation of IGBT modules and heat sinks,and provides guidance for their future applications.

Two-Dimensional Transition Metal Dichalcogenides and Their Charge Carrier Mobilities in Field-Effect Transistors

Two-dimensional(2D) materials have attracted extensive interest due to their excellent electrical, thermal,mechanical, and optical properties. Graphene has been one of the most explored 2D materials. However, its zero band gap has limited its applications in electronic devices. Transition metal dichalcogenide(TMDC), another kind of 2D material,has a nonzero direct band gap(same charge carrier momentum in valence and conduction band) at monolayer state,promising for the efficient switching devices(e.g., field-effect transistors). This review mainly focuses on the recent advances in charge carrier mobility and the challenges to achieve high mobility in the electronic devices based on 2DTMDC materials and also includes an introduction of 2D materials along with the synthesis techniques. Finally, this review describes the possible methodology and future prospective to enhance the charge carrier mobility for electronic devices.

Review of gallium oxide based field-effect transistors and Schottky barrier diodes

Gallium oxide(Ga_2O_3), a typical ultra wide bandgap semiconductor, with a bandgap of ~4.9 e V, critical breakdown field of 8 MV/cm, and Baliga's figure of merit of 3444, is promising to be used in high-power and high-voltage devices.Recently, a keen interest in employing Ga_2O_3 in power devices has been aroused. Many researches have verified that Ga_2O_3 is an ideal candidate for fabricating power devices. In this review, we summarized the recent progress of field-effect transistors(FETs) and Schottky barrier diodes(SBDs) based on Ga_2O_3, which may provide a guideline for Ga_2O_3 to be preferably used in power devices fabrication.

Environmental Analysis with 2D Transition-Metal Dichalcogenide-Based Field-Effect Transistors

Field-effect transistors(FETs)present highly sensitive,rapid,and in situ detection capability in chemical and biological analysis.Recently,two-dimensional(2D)transition-metal dichalcogenides(TMDCs)attract significant attention as FET channel due to their unique structures and outstanding properties.With the booming of studies on TMDC FETs,we aim to give a timely review on TMDCbased FET sensors for environmental analysis in different media.First,theoretical basics on TMDC and FET sensor are introduced.Then,recent advances of TMDC FET sensor for pollutant detection in gaseous and aqueous media are,respectively,discussed.At last,future perspectives and challenges in practical application and commercialization are given for TMDC FET sensors.This article provides an overview on TMDC sensors for a wide variety of analytes with an emphasize on the increasing demand of advanced sensing technologies in environmental analysis.

Mobility enhancement of strained GaSb p-channel metal-oxide-semiconductor field-effect transistors with biaxial compressive strain

Various biaxial compressive strained GaSb p-channel metal-oxide-semiconductor field-effect transistors （MOSFETs） are experimentally and theoretically investigated, The biaxial compressive strained GaSb MOSFETs show a high peak mobility of 638 cm2/V.s, which is 3.86 times of the extracted mobility of the fabricated GaSb MOSFETs without strain. Meanwhile, first principles calculations show that the hole effective mass of GaSb depends on the biaxial compressive strain. The biaxiai compressive strain brings a remarkable enhancement of the hole mobility caused by a significant reduction in the hole effective mass due to the modulation of the valence bands.

Unique Characteristics of Vertical Carbon Nanotube Field-effect Transistors on Silicon

A vertical carbon nanotube field-effect transistor(CNTFET) based on silicon(Si) substrate has been proposed and simulated using a semi-classical theory. A single-walled carbon nanotube(SWNT) and an n-type Si nanowire in series construct the channel of the transistor. The CNTFET presents ambipolar characteristics at positive drain voltage(Vd) and n-type characteristics at negative Vd. The current is significantly influenced by the doping level of n-Si and the SWNT band gap. The n-branch current of the ambipolar characteristics increases with increasing doping level of the n-Si while the p-branch current decreases. The SWNT band gap has the same influence on the p-branch current at a positive Vd and n-type characteristics at negative Vd. The lower the SWNT band gap, the higher the current. However, it has no impact on the n-branch current in the ambipolar characteristics. Thick oxide is found to significantly degrade the current and the subthreshold slope of the CNTFETs.

Field-effect transistors based on two-dimensional materials for logic applications

Field-effect transistors （FETs） for logic applications, graphene and MoS2, are discussed. These materials have based on two representative two-dimensional （2D） materials, drastically different properties and require different consider- ations. The unique band structure of graphene necessitates engineering of the Dirac point, including the opening of the bandgap, the doping and the interface, before the graphene can be used in logic applications. On the other hand, MoS2 is a semiconductor, and its electron transport depends heavily on the surface properties, the number of layers, and the carrier density. Finally, we discuss the prospects for the future developments in 2D material transistors.

Design consideration and fabrication of 1.2-kV 4H-SiC trenched-and-implanted vertical junction field-effect transistors

We present the design consideration and fabrication of 4H-SiC trenched-and-implanted vertical junction field-effect transistors （TI-VJFETs）. Different design factors, including channel width, channel doping, and mesa height, are con- sidered and evaluated by numerical simulations. Based on the simulation result, normally-on and normally-off devices are fabricated. The fabricated device has a 12 μm thick drift layer with 8 × 10^15 cm^-3 N-type doping and 2.6 μm channel length. The normally-on device shows a 1.2 kV blocking capability with a minimum on-state resistance of 2.33 mΩ.cm2, while the normally-off device shows an on-state resistance of 3.85 mΩ.cm2. Both the on-state and the blocking performances of the device are close to the state-of-the-art values in this voltage range.

High-performance junction field-effect transistor based on black phosphorus/β-Ga2O3 heterostructure

Black phosphorous(BP),an excellent two-dimensional(2D)monoelemental layered p-type semiconductor material with high carrier mobility and thickness-dependent tunable direct bandgap structure,has been widely applied in various devices.As the essential building blocks for modern electronic and optoelectronic devices,high quality PN junctions based on semiconductors have attracted widespread attention.Herein,we report a junction field-effect transistor(JFET)by integrating narrow-gap p-type BP and ultra-wide gap n-typeβ-Ga2O3 nanoflakes for the first time.BP andβ-Ga2O3 form a vertical van der Waals(vdW)heterostructure by mechanically exfoliated method.The BP/β-Ga2O3 vdW heterostructure exhibits remarkable PN diode rectifying characteristics with a high rectifying ratio about 107 and a low reverse current around pA.More interestingly,by using the BP as the gate andβ-Ga2O3 as the channel,the BP/β-Ga2O3 JFET devices demonstrate excellent n-channel JFET characteristics with the on/off ratio as high as 107,gate leakage current around as low as pA,maximum transconductance(gm)up to 25.3μS and saturation drain current(IDSS)of 16.5μA/μm.Moreover,it has a pinch-off voltage of–20 V and a minimum subthreshold swing of 260 mV/dec.These excellent n-channel JFET characteristics will expand the application of BP in future nanoelectronic devices.

A review for compact model of graphene field-effect transistors

Graphene has attracted enormous interests due to its unique physical, mechanical, and electrical properties. Specially, graphene-based field-effect transistors （FETs） have evolved rapidly and are now considered as an option for conventional silicon devices. As a critical step in the design cycle of modem IC products, compact model refers to the development of models for integrated semiconductor devices for use in circuit simulations. The purpose of this review is to provide a theoretical description of current compact model of graphene field-effect transistors. Special attention is devoted to the charge sheet model, drift-diffusion model, Boltzmann equation, density of states （DOS）, and surface-potential-based compact model. Finally, an outlook of this field is briefly discussed.

A high mobility C_(60) field-effect transistor with an ultrathin pentacene passivation layer and bathophenanthroline/metal bilayer electrodes

C60 field-effect transistor （OFET） with a mobility as high as 5.17 cm2/V.s is fabricated. In our experiment, an ultrathin pentacene passivation layer on poly-（methyl methacrylate） （PMMA） insulator and a bathophenanthroline （Bphen）/Ag bilayer electrode are prepared. The OFET shows a significant enhancement of electron mobility compared with the corresponding device with a single PMMA insultor and an Ag electrode. By analysing the C60 film with atomic force microscopy and X-ray diffraction techniques, it is shown that the pentacene passivation layer can contribute to C60 film growth with the large grain size and significantly improve crystallinity. Moreover, the Bphen buffer layer can reduce the electron contact barrier from Ag electrodes to C60 film efficiently.

A combined virtual impactor and field-effect transistor microsystem for particulate matter separation and detection

Ambient suspended particulate matter(PM)(primarily with particle diameter 2.5m or less,i.e.,PM2.5)can adversely affect ecosystems and human health.Currently,optical particle sensors based on light scattering dominate the portable PM sensing market.However,the light scattering method has poor adaptability to different-sized PM and adverse environmental conditions.Here,we design and develop a portable PM sensing microsystem that consists of a micromachined virtual impactor(VI)for particle separation,a thermophoretic deposition chip for particle collection,and an extended-gate field-effect transistor(FET)for particle analysis.This system can realize on-site separation,collection,and analysis of aerosol particles without being influenced by environmental factors.In this study,the design of the VI is thoroughly analyzed by numerical simulation,and mixtures of different-sized silicon dioxide(SiO2)particles are used in an experimental verification of the performance of the VI and FET.Considering the low cost and compact design of the whole system,the proposed PM analysis microsystem has potential for PM detection under a wide range of conditions,such as heavily polluted industrial environments and for point-of-need outdoor and indoor air quality monitoring.

Hot-Carrier Effects on Total Dose Irradiated 65 nm n-Type Metal-Oxide-Semiconductor Field-Effect Transistors

The influence of total dose irradiation on hot-carrier reliability of 65 nm n-type metal-oxide-semiconductor field- effect transistors （nMOSFETs） is investigated. Experimental results show that hot-carrier degradations on ir- radiated narrow channel nMOSFETs are greater than those without irradiation. The reason is attributed to radiation-induced charge trapping in shallow trench isolation （STI）. The electric field in the pinch-off region of the nMOSFET is enhanced by radiation-induced charge trapping in STI, resulting in a more severe hot-carrier effect.

Modeling electric field of power metal-oxide-semiconductor field-effect transistor with dielectric trench based on Schwarz–Christoffel transformation

A power metal-oxide-semiconductor field-effect transistor(MOSFET) with dielectric trench is investigated to enhance the reversed blocking capability. The dielectric trench with a low permittivity to reduce the electric field at reversed blocking state has been studied. To analyze the electric field, the drift region is segmented into four regions, where the conformal mapping method based on Schwarz–Christoffel transformation has been applied. According to the analysis, the improvement in the electric field for using the low permittivity trench is mainly due to the two electric field peaks generated in the drift region around this dielectric trench. The analytical results of the electric field and the potential models are in good agreement with the simulation results.

FinFET芯片TEM样品制备及避免窗帘效应方法

制备高质量纳米尺度芯片透射电子显微镜(TEM)样品对于探索半导体器件结构设计、材料分布与芯片性能之间的关系具有重要的意义。使用聚焦离子束(FIB)/扫描电子显微镜(SEM)双束系统制备14 nm鳍式场效应晶体管(FinFET)截面TEM样品,制备过程中从技术角度提出了两种自下而上制样方案来抑制窗帘效应。为扩大样品的可表征视场范围,在避免样品弯曲的前提下,提出了一种薄片提取方法。结果表明,离子束流越大,窗帘效应越严重,自下而上方法能有效规避窗帘效应;离子束电压30 kV时采用清洗截面(CCS)模式、5 kV/2 kV时采用矩形模式,样品台倾斜补偿角度为1.5°~3.5°,进行交叉减薄,且最终铣削长度控制在1μm时减薄效果最好;新的薄片提取方法改变了样品的铣削方向,在避免窗帘效应破坏感兴趣结构和样品弯曲的前提下,将样品的可表征视场范围扩大了5倍。研究结果对优化TEM样品制备方法以及芯片失效分析提供了参考。

Evaluation of a gate-first process for AlGaN/GaN metal-oxide-semiconductor heterostructure field-effect transistors with low ohmic annealing temperature

In this paper, TiN/A1Ox gated A1GaN/GaN metal-oxide-semiconductor heterostructure field-effect transistors （MOS- HFETs） were fabricated for gate-first process evaluation. By employing a low temperature ohmic process, ohmic contact can be obtained by annealing at 600 ℃ with the contact resistance approximately 1.6 Ω.mm. The ohmic annealing process also acts as a post-deposition annealing on the oxide film, resulting in good device performance. Those results demonstrated that the TiN/A1Ox gated MOS-HFETs with low temperature ohmic process can be applied for self-aligned gate AIGaN/GaN MOS-HFETs.

14 nm pFinFET 器件抗单粒子辐射的加固方法

为探究先进互补金属氧化物半导体(CMOS)工艺在空间应用中的可靠性问题,研究14 nm工艺下P型沟道鳍式场效应晶体管(pFinFET)器件中的抗单粒子瞬态(SET)加固策略。通过在器件中插入平行于鳍方向的重掺杂N型沟槽(Ntie)和P型沟槽(Ptie)来减缓SET的影响。三维TCAD仿真结果表明:加固之后器件的抗SET特性和沟槽本身的偏置条件相关。当重掺杂沟槽处于零偏状态时,抗辐射加固的性能最好,SET脉冲宽度降低程度可达40%左右;然而,当处于反偏状态时,由于特殊的电荷收集过程的存在,使得SET脉冲幅度反而会明显增大,脉冲宽度减小程度并不明显。此外,还研究沟槽面积、间距及掺杂浓度对pFinFET中的SET脉冲宽度的影响,得到提高抗SET效果的加固方法。