An application specific integrated circuit (ASIC) design of a 1024 points floating-point fast Fourier transform(FFT) processor is presented. It can satisfy the requirement of high accuracy FFT result in related fields...An application specific integrated circuit (ASIC) design of a 1024 points floating-point fast Fourier transform(FFT) processor is presented. It can satisfy the requirement of high accuracy FFT result in related fields. Several novel design techniques for floating-point adder and multiplier are introduced in detail to enhance the speed of the system. At the same time, the power consumption is decreased. The hardware area is effectively reduced as an improved butterfly processor is developed. There is a substantial increase in the performance of the design since a pipelined architecture is adopted, and very large scale integrated (VLSI) is easy to realize due to the regularity. A result of validation using field programmable gate array (FPGA) is shown at the end. When the system clock is set to 50 MHz, 204.8 μs is needed to complete the operation of FFT computation.展开更多
A numerical model based on a boundary element method (BEM) is developed to predict the performance of two-body selfreacting floating-point absorber (SRFPA) wave energy systems that operate predominantly in heave.The k...A numerical model based on a boundary element method (BEM) is developed to predict the performance of two-body selfreacting floating-point absorber (SRFPA) wave energy systems that operate predominantly in heave.The key numerical issues in applying the BEM are systematically discussed.In particular,some improvements and simplifications in the numerical scheme are developed to evaluate the free surface Green's function,which is a main element of difficulty in the BEM.For a locked SRFPA system,the present method is compared with the existing experiment and the Reynolds-averaged NavierStokes (RANS)-based method,where it is shown that the inviscid assumption leads to substantial over-prediction of the heave response.For the unlocked SRFPA model we study in this paper,the additional viscous damping primarily induced by flow separation and vortex shedding,is modelled as a quadratic drag force,which is proportional to the square of body velocity.The inclusion of viscous drag in present method significantly improves the prediction of the heave responses and the power absorption performance of the SRFPA system,obtaining results excellent agreement with experimental data and the RANS simulation results over a broad range of incident wave periods,except near resonance in larger wave height scenarios.It is found that the wave overtopping and the re-entering impact of out-of-water floating body are observed more frequently in larger waves,where these non-linear effects are the dominant damping sources and could significantly reduce the power output and the motion responses of the SRFPA system.展开更多
The algorithm and its implementation of the leading zero anticipation （LZA） are very vital for the performance of a high-speed floating-point adder in today＇s state of art microprocessor design. Unfortunately, in p...The algorithm and its implementation of the leading zero anticipation （LZA） are very vital for the performance of a high-speed floating-point adder in today＇s state of art microprocessor design. Unfortunately, in predicting ＂shift amount＂ by a conventional LZA design, the result could be off by one position. This paper presents a novel parallel error detection algorithm for a general-case LZA. The proposed approach enables parallel execution of conventional LZA and its error detection, so that the error-indicatlon signal can be generated earlier in the stage of normalization, thus reducing the critical path and improving overall performance. The circuit implementation of this algorithm also shows its advantages of area and power compared with other previous work.展开更多
文摘An application specific integrated circuit (ASIC) design of a 1024 points floating-point fast Fourier transform(FFT) processor is presented. It can satisfy the requirement of high accuracy FFT result in related fields. Several novel design techniques for floating-point adder and multiplier are introduced in detail to enhance the speed of the system. At the same time, the power consumption is decreased. The hardware area is effectively reduced as an improved butterfly processor is developed. There is a substantial increase in the performance of the design since a pipelined architecture is adopted, and very large scale integrated (VLSI) is easy to realize due to the regularity. A result of validation using field programmable gate array (FPGA) is shown at the end. When the system clock is set to 50 MHz, 204.8 μs is needed to complete the operation of FFT computation.
基金We would like to acknowledge the National Natural Science Foundation of China(Grants 51479114,51761135012)for supporting this work.
文摘A numerical model based on a boundary element method (BEM) is developed to predict the performance of two-body selfreacting floating-point absorber (SRFPA) wave energy systems that operate predominantly in heave.The key numerical issues in applying the BEM are systematically discussed.In particular,some improvements and simplifications in the numerical scheme are developed to evaluate the free surface Green's function,which is a main element of difficulty in the BEM.For a locked SRFPA system,the present method is compared with the existing experiment and the Reynolds-averaged NavierStokes (RANS)-based method,where it is shown that the inviscid assumption leads to substantial over-prediction of the heave response.For the unlocked SRFPA model we study in this paper,the additional viscous damping primarily induced by flow separation and vortex shedding,is modelled as a quadratic drag force,which is proportional to the square of body velocity.The inclusion of viscous drag in present method significantly improves the prediction of the heave responses and the power absorption performance of the SRFPA system,obtaining results excellent agreement with experimental data and the RANS simulation results over a broad range of incident wave periods,except near resonance in larger wave height scenarios.It is found that the wave overtopping and the re-entering impact of out-of-water floating body are observed more frequently in larger waves,where these non-linear effects are the dominant damping sources and could significantly reduce the power output and the motion responses of the SRFPA system.
文摘The algorithm and its implementation of the leading zero anticipation （LZA） are very vital for the performance of a high-speed floating-point adder in today＇s state of art microprocessor design. Unfortunately, in predicting ＂shift amount＂ by a conventional LZA design, the result could be off by one position. This paper presents a novel parallel error detection algorithm for a general-case LZA. The proposed approach enables parallel execution of conventional LZA and its error detection, so that the error-indicatlon signal can be generated earlier in the stage of normalization, thus reducing the critical path and improving overall performance. The circuit implementation of this algorithm also shows its advantages of area and power compared with other previous work.
