A Large Dynamic Range Floating Memristor Emulator With Equal Port Current Restriction

In this paper, a large dynamic range floating memristor emulator(LDRFME) with equal port current restriction is proposed to be achieved by a large dynamic range floating voltage-controlled linear resistor(VCLR). Since real memristors have not been largely commercialized until now, the application of a LDRFME to memristive systems is reasonable. Motivated by this need, this paper proposes an achievement of a LDRFME based on a feasible transistor model. A first circuit extends the voltage range of the triode region of an ordinary junction field effect transistor(JFET). The idea is to use this JFET transistor as a tunable linear resistor. A second memristive non-linear circuit is used to drive the resistance of the first JFET transistor. Then those two circuits are connected together and, under certain conditions, the obtained "resistor" presents a hysteretic behavior,which is considered as a memristive effect. The electrical characteristics of a LDRFME are validated by software simulation and real measurement, respectively.

Fractional-order memristive neural synaptic weighting achieved by pulse-based fracmemristor bridge circuit

We propose a novel circuit for the fractional-order memristive neural synaptic weighting(FMNSW).The introduced circuit is different from the majority of the previous integer-order approaches and offers important advantages. Since the concept of memristor has been generalized from the classic integer-order memristor to the fractional-order memristor(fracmemristor), a challenging theoretical problem would be whether the fracmemristor can be employed to implement the fractional-order memristive synapses or not. In this research, characteristics of the FMNSW, realized by a pulse-based fracmemristor bridge circuit, are investigated. First, the circuit configuration of the FMNSW is explained using a pulse-based fracmemristor bridge circuit. Second, the mathematical proof of the fractional-order learning capability of the FMNSW is analyzed. Finally, experimental work and analyses of the electrical characteristics of the FMNSW are presented. Strong ability of the FMNSW in explaining the cellular mechanisms that underlie learning and memory, which is superior to the traditional integer-order memristive neural synaptic weighting, is considered a major advantage for the proposed circuit.