The operating frequency accuracy of the local oscillators is critical for the overall system performance in the communication systems.However,the high-precision oscillators could be too expensive for civil application...The operating frequency accuracy of the local oscillators is critical for the overall system performance in the communication systems.However,the high-precision oscillators could be too expensive for civil applications.In this paper,we propose a model-free adaptive frequency calibration framework for a voltage-controlled crystal oscillator(VCO)equipped with a time to digital converter(TDC),which can significantly improve the frequency accuracy of the VCO thus calibrated.The idea is to utilize a high-precision TDC to directly measure the VCO period which is then passed to a model-free method for working frequency calibration.One advantage of this method is that the working frequency calibration employs the system history of input/output(I/O)data,instead of establishing an accurate VCO voltagecontrolled oscillator model.Another advantage is the lightweight calibration method with low complexity such that it can be implemented on an MCU with limited computation capabilities.Experimental results show that the proposed calibration method can improve the frequency accuracy of a VCO from±20 ppm to±10 ppb,which indicates the promise of the modelfree adaptive frequency calibrator for VCOs.展开更多
A 2.7-4.0 GHz dual-mode auto frequency calibration(AFC) fast locking PLL was designed for navigation system on chip(SoC). The SoC was composed of one radio frequency(RF) receiver, one baseband and several system contr...A 2.7-4.0 GHz dual-mode auto frequency calibration(AFC) fast locking PLL was designed for navigation system on chip(SoC). The SoC was composed of one radio frequency(RF) receiver, one baseband and several system control parts. In the proposed AFC block, both analog and digital modes were designed to complete the AFC process. In analog mode, the analog part sampled and detected the charge pump output tuning voltage, which would give the indicator to digital part to adjust the voltage control oscillator(VCO) capacitor bank. In digital mode, the digital part counted the phase lock loop(PLL) divided clock to judge whether VCO frequency was fast or slow. The analog and digital modes completed the auto frequency calibration function independently by internal switch. By designing a special switching algorithm, the switch of the digital and analog mode could be realized anytime during the lock and unlock detecting process for faster and more stable locking. This chip is fabricated in 0.13 μm RF complementary metal oxide semiconductor(CMOS) process, and the VCO supports the frequency range from 2.7 to 4.0 GHz. Tested 3.96 GHz frequency phase noise is -90 d Bc/Hz@100 k Hz frequency offset and -120 d Bc/Hz@1 MHz frequency offset. By using the analog mode in lock detection and digital mode in unlock detection, tested AFC time is less than 9 μs and the total PLL lock time is less than 19 μs. The SoC acquisition and tracking sensitivity are about-142 d Bm and-155 d Bm, respectively. The area of the proposed PLL is 0.35 mm^2 and the total SoC area is about 9.6 mm^2.展开更多
We present our state-of-the-art version of a frequency comb for calibration of astronomical spectrographs. The mode spacing of the frequency comb can be designed to match the resolution of a spectrograph. Combined wit...We present our state-of-the-art version of a frequency comb for calibration of astronomical spectrographs. The mode spacing of the frequency comb can be designed to match the resolution of a spectrograph. Combined with its excellent accuracy and stability, the spectral coverage of more than 70% of the whole visible spectrum range makes the frequency comb an ideal calibration source. In addition, the new version introduces the automatic start-up function that brings convenience to the astronomers.展开更多
Beam current dependence resulted from nonlinearity and asymmetry of the four channels of digital BPM(Beam Position Monitor) processor deteriorates the BPM performance.A systematic solution based on signal source calib...Beam current dependence resulted from nonlinearity and asymmetry of the four channels of digital BPM(Beam Position Monitor) processor deteriorates the BPM performance.A systematic solution based on signal source calibration tactics has been carried out to rectify this defect.It is optimized for implementation in FPGA.Mathematical illustrations of the calibration method,hardware and software design and implementation are presented.A signal source circuit using frequency synthesis technique is designed as calibration standard.Data acquisition system using JAVA web technology and Ethernet is introduced.Integrated FPGA implementation code architecture is presented,and experimental test results show that the method implemented in FPGA is feasible.Compared to other methods,our approach can rectify the nonlinearity and asymmetry simultaneously.The whole solution is integrated into the DBPM processor and can be executed online.展开更多
A fractional-N frequency synthesizer for 433/868MHz SRD applications is implemented in a 0.3μm CMOS process. A wide-band VCO and an AFC are used to cover the desired bands. A 3bit third order sigma-delta modulator is...A fractional-N frequency synthesizer for 433/868MHz SRD applications is implemented in a 0.3μm CMOS process. A wide-band VCO and an AFC are used to cover the desired bands. A 3bit third order sigma-delta modulator is adopted to reduce the out-band phase noise. The measurements show a VCO tuning range from 1.31 to 1.88GHz with AFC working correctly,an out-band phase noise of -139dBc/Hz at 3MHz offset frequency, and a fractional spur of less than - 60dBc. The chip area is 1.5mm × 1.2mm and the total current dissipation including LO buffers is 19mA from a single 3.0V supply voltage.展开更多
A fully integrated integer-N frequency synthesizer is implemented.The synthesizer is designed for low intermediate frequency (IF)ZigBee transceiver applications.Techniques used to make the loop bandwidth constant ac...A fully integrated integer-N frequency synthesizer is implemented.The synthesizer is designed for low intermediate frequency (IF)ZigBee transceiver applications.Techniques used to make the loop bandwidth constant across the whole output frequency range of the voltage controlled oscillator(VCO)are adopted to maintain phase noise optimization and loop stability.In-phase and quadrature(IQ)signals are generated by a 1/2 frequency divider at the output of the VCO.The synthesizer is fabricated in 0.18 μm radio frequency(RF) complementary metal oxide semiconductor transistor (CMOS)technology.The chip area is 1.7 mm2.The synthesizer is measured on wafer.It consumes totally 28.8 mW excluding output buffers from a supply voltage of 1.8 V.The measured phase noise is -110 and -122 dBc/Hz at the offset of 1 and 3 MHz from a 2.405 GHz carrier,respectively.The measured reference spur at a 2 MHz offset from a 2.405 GHz carrier is-48.2 dBc.The measured setting time of the synthesizer is about 160 μs.展开更多
In order to solve the problems of the fine division of sedimentary sequence cycles and their change in two-dimensional space as well as lateral extension contrast, we developed a method of wavelet depth-frequency anal...In order to solve the problems of the fine division of sedimentary sequence cycles and their change in two-dimensional space as well as lateral extension contrast, we developed a method of wavelet depth-frequency analysis. The single signal and composite signal of different Milankovitch cycles are obtained by numerical simulation. The simulated composite signal can be separated into single signals of a single frequency cycle. We also develop a well-seismic calibration insertion technology which helps to realize the calibration from the spectrum characteristics of a single well to the seismic profile. And then we determine the change and distribution characteristics of spectrum cycles in the two-dimensional space. It points out the direction in determining the variations of the regional sedimentary sequence cycles, underground strata structure and the contact relationship.展开更多
High frequency ground wave radar (HFGWR) has unique advantage in the survey of dynamical factors, such as sea surface current, sea wave, and sea surface wind in marine conditions in coastal sea area. Compared to mar...High frequency ground wave radar (HFGWR) has unique advantage in the survey of dynamical factors, such as sea surface current, sea wave, and sea surface wind in marine conditions in coastal sea area. Compared to marine satellite remote sensing, it involves lower cost, has higher measuring accuracy and spatial resolution and sampling frequency. High frequency ground wave radar is a new land based remote sensing instrument with superior vision and greater application potentials. This paper reviews the development history and application status of high frequency wave radar, introduces its remote-sensing principle and method to inverse offshore fluid, and wave and wind field. Based on the author's "863 Project", this paper recounts comparison and verification of radar remote-sensing value, the physical calibration of radar-measured data and methods to control the quality of radar-sensing data. The authors discuss the precision of radar-sensing data's inversing on offshore fluid field and application of the assimilated data on assimilation.展开更多
A fully automatic setup for on-wafer contact probing will be presented. This setup consists of six automatable nano positioning axes used as tool holder and a sample holder. With this setup a fully automatic one-port ...A fully automatic setup for on-wafer contact probing will be presented. This setup consists of six automatable nano positioning axes used as tool holder and a sample holder. With this setup a fully automatic one-port SOL calibration for a Vector Network Analyzer is done. Furthermore a fully automated on-wafer contact probing is performed. Afterwards, the effects of a misalignment of the three tips of a GSG-probe are examined. Additionally the error on the calibration is calculated to determine its effect on the measurement. The results show, that a misalignment of the probe has a high impact on the measurement of the VNA. Hence a fully automated on-wafer probing presented in this paper is a good way to detect these misalignments and correct them if necessary.展开更多
文摘The operating frequency accuracy of the local oscillators is critical for the overall system performance in the communication systems.However,the high-precision oscillators could be too expensive for civil applications.In this paper,we propose a model-free adaptive frequency calibration framework for a voltage-controlled crystal oscillator(VCO)equipped with a time to digital converter(TDC),which can significantly improve the frequency accuracy of the VCO thus calibrated.The idea is to utilize a high-precision TDC to directly measure the VCO period which is then passed to a model-free method for working frequency calibration.One advantage of this method is that the working frequency calibration employs the system history of input/output(I/O)data,instead of establishing an accurate VCO voltagecontrolled oscillator model.Another advantage is the lightweight calibration method with low complexity such that it can be implemented on an MCU with limited computation capabilities.Experimental results show that the proposed calibration method can improve the frequency accuracy of a VCO from±20 ppm to±10 ppb,which indicates the promise of the modelfree adaptive frequency calibrator for VCOs.
基金Project(2011912004)supported by the Major Program of the Economic & Information Commission Program of Guangdong Province,ChinaProjects(2011B010700065,2011A090200106)supported by the Major Program of the Department of Science and Technology of Guangdong Province,China
文摘A 2.7-4.0 GHz dual-mode auto frequency calibration(AFC) fast locking PLL was designed for navigation system on chip(SoC). The SoC was composed of one radio frequency(RF) receiver, one baseband and several system control parts. In the proposed AFC block, both analog and digital modes were designed to complete the AFC process. In analog mode, the analog part sampled and detected the charge pump output tuning voltage, which would give the indicator to digital part to adjust the voltage control oscillator(VCO) capacitor bank. In digital mode, the digital part counted the phase lock loop(PLL) divided clock to judge whether VCO frequency was fast or slow. The analog and digital modes completed the auto frequency calibration function independently by internal switch. By designing a special switching algorithm, the switch of the digital and analog mode could be realized anytime during the lock and unlock detecting process for faster and more stable locking. This chip is fabricated in 0.13 μm RF complementary metal oxide semiconductor(CMOS) process, and the VCO supports the frequency range from 2.7 to 4.0 GHz. Tested 3.96 GHz frequency phase noise is -90 d Bc/Hz@100 k Hz frequency offset and -120 d Bc/Hz@1 MHz frequency offset. By using the analog mode in lock detection and digital mode in unlock detection, tested AFC time is less than 9 μs and the total PLL lock time is less than 19 μs. The SoC acquisition and tracking sensitivity are about-142 d Bm and-155 d Bm, respectively. The area of the proposed PLL is 0.35 mm^2 and the total SoC area is about 9.6 mm^2.
文摘We present our state-of-the-art version of a frequency comb for calibration of astronomical spectrographs. The mode spacing of the frequency comb can be designed to match the resolution of a spectrograph. Combined with its excellent accuracy and stability, the spectral coverage of more than 70% of the whole visible spectrum range makes the frequency comb an ideal calibration source. In addition, the new version introduces the automatic start-up function that brings convenience to the astronomers.
基金Supported by the National Natural Science Foundation of China(No.11075198)
文摘Beam current dependence resulted from nonlinearity and asymmetry of the four channels of digital BPM(Beam Position Monitor) processor deteriorates the BPM performance.A systematic solution based on signal source calibration tactics has been carried out to rectify this defect.It is optimized for implementation in FPGA.Mathematical illustrations of the calibration method,hardware and software design and implementation are presented.A signal source circuit using frequency synthesis technique is designed as calibration standard.Data acquisition system using JAVA web technology and Ethernet is introduced.Integrated FPGA implementation code architecture is presented,and experimental test results show that the method implemented in FPGA is feasible.Compared to other methods,our approach can rectify the nonlinearity and asymmetry simultaneously.The whole solution is integrated into the DBPM processor and can be executed online.
文摘A fractional-N frequency synthesizer for 433/868MHz SRD applications is implemented in a 0.3μm CMOS process. A wide-band VCO and an AFC are used to cover the desired bands. A 3bit third order sigma-delta modulator is adopted to reduce the out-band phase noise. The measurements show a VCO tuning range from 1.31 to 1.88GHz with AFC working correctly,an out-band phase noise of -139dBc/Hz at 3MHz offset frequency, and a fractional spur of less than - 60dBc. The chip area is 1.5mm × 1.2mm and the total current dissipation including LO buffers is 19mA from a single 3.0V supply voltage.
基金The National High Technology Research and Development Program of China (863 Program)(No.2007AA01Z2A7)the Scienceand Technology Program of Zhejiang Province (No.2008C16017)
文摘A fully integrated integer-N frequency synthesizer is implemented.The synthesizer is designed for low intermediate frequency (IF)ZigBee transceiver applications.Techniques used to make the loop bandwidth constant across the whole output frequency range of the voltage controlled oscillator(VCO)are adopted to maintain phase noise optimization and loop stability.In-phase and quadrature(IQ)signals are generated by a 1/2 frequency divider at the output of the VCO.The synthesizer is fabricated in 0.18 μm radio frequency(RF) complementary metal oxide semiconductor transistor (CMOS)technology.The chip area is 1.7 mm2.The synthesizer is measured on wafer.It consumes totally 28.8 mW excluding output buffers from a supply voltage of 1.8 V.The measured phase noise is -110 and -122 dBc/Hz at the offset of 1 and 3 MHz from a 2.405 GHz carrier,respectively.The measured reference spur at a 2 MHz offset from a 2.405 GHz carrier is-48.2 dBc.The measured setting time of the synthesizer is about 160 μs.
基金supported by the Fundamental Research Funds for the Central Universities(Grant No.2011YYL128)the CNPC Innovation Foundation(GrantNo.2012D-5006-0103)the Ministry of Land and Resources special funds for scientific research on public cause(Grant No.201311107)
文摘In order to solve the problems of the fine division of sedimentary sequence cycles and their change in two-dimensional space as well as lateral extension contrast, we developed a method of wavelet depth-frequency analysis. The single signal and composite signal of different Milankovitch cycles are obtained by numerical simulation. The simulated composite signal can be separated into single signals of a single frequency cycle. We also develop a well-seismic calibration insertion technology which helps to realize the calibration from the spectrum characteristics of a single well to the seismic profile. And then we determine the change and distribution characteristics of spectrum cycles in the two-dimensional space. It points out the direction in determining the variations of the regional sedimentary sequence cycles, underground strata structure and the contact relationship.
基金Supported by the High-Tech Research and Development Program of China (863 Program. No. 2002AA639150 2001AA633070)
文摘High frequency ground wave radar (HFGWR) has unique advantage in the survey of dynamical factors, such as sea surface current, sea wave, and sea surface wind in marine conditions in coastal sea area. Compared to marine satellite remote sensing, it involves lower cost, has higher measuring accuracy and spatial resolution and sampling frequency. High frequency ground wave radar is a new land based remote sensing instrument with superior vision and greater application potentials. This paper reviews the development history and application status of high frequency wave radar, introduces its remote-sensing principle and method to inverse offshore fluid, and wave and wind field. Based on the author's "863 Project", this paper recounts comparison and verification of radar remote-sensing value, the physical calibration of radar-measured data and methods to control the quality of radar-sensing data. The authors discuss the precision of radar-sensing data's inversing on offshore fluid field and application of the assimilated data on assimilation.
文摘A fully automatic setup for on-wafer contact probing will be presented. This setup consists of six automatable nano positioning axes used as tool holder and a sample holder. With this setup a fully automatic one-port SOL calibration for a Vector Network Analyzer is done. Furthermore a fully automated on-wafer contact probing is performed. Afterwards, the effects of a misalignment of the three tips of a GSG-probe are examined. Additionally the error on the calibration is calculated to determine its effect on the measurement. The results show, that a misalignment of the probe has a high impact on the measurement of the VNA. Hence a fully automated on-wafer probing presented in this paper is a good way to detect these misalignments and correct them if necessary.