Design of an Analog Front End for Passive UHF RFID Transponder IC

This paper introduces a high-performance analog front end for a passive UHF RFID transponder IC, which is compatible with the ISO/IEC 18000-6B standard,operating at the 915MHz ISM band with a total supply current consumption less than 8μA. There are no external components, except for the antenna. The passive IC＇s power supply is taken from the energy of the received RF electromagnetic field with the help of a Schottky diode rectifier. The RFID analog front end includes a local oscillator, clock generator, power on reset circuit, matching network and backscatter,rectifier,regulator, and AM demodulator. The IC, whose reading distance is more than 3m,is fabricated with a Chartered 0.35μm two-poly four-metal CMOS process with Schottky diodes and is EEPROM supported. The core size is 300μm × 720μm.

SYSTEMATIC METHOD TO GENERATE NEW IDEAS IN FUZZY FRONT END USING TRIZ

The obstacle for idea generation in fuzzy front end （FFE） is difficult to apply knowledge in different fields for designers. Theory of inventive problem solving TRIZ and computer-aided innovation systems （CAIs） which are TRIZ-base software systems with a knowledge base provide a framework for knowledge application in different fields. The major methods in TRIZ are selected, which have four types. The problems to be solved for each method are summarized and mapping from the problems to the methods is given. Systematic method with eight paths to integrate the methods and problems is formed. A case study shows the idea generation in FFE using the integrated method step by step.

基于硅工艺的12GHz单片接收RF Front-End设计

提出了一种基于硅材料的、工作在12 GHz频率的用于接收卫星数字图像广播的单片射频前端系统,该系统含有低噪声放大器、混频器和第二级放大器,所有的电路都集成在硅材料工艺中,可以用于频率在12GHz的卫星通信频段信号的接收。

RF front-end for digital beam position monitor signal processor

RF circuit board has a significant impact on performance of the Digital Beam Position Monitor (DBPM) in storage ring of a synchrotron radiation facility.In this paper,a front-end RF board is designed for DBPM,and schematics of the RF board and the test results are given.In view of the inevitable inconsistency in the multi-channel circuit,a calibration circuit is designed to reduce such an influence.The test results show that the calibration method is useful for beam current dependence which is sensitive to channels inconsistency.

Multi-frequency point supported LLRF front-end for CiADS wide-bandwidth application

The China initiative Accelerator Driven System,CiADS,physics design adopts 162.5 MHz,325 MHz,and 650 MHz cavities,which are driven by the corresponding radio frequency(RF)power system,requiring frequency translation front-end for the RF station.For that application,a general-purpose design front-end prototype has been developed to evaluate the multi-frequency point supported design feasibility.The difficult parts to achieve the requirements of the general-purpose design are reasonable device selection and balanced design.With a carefully selected low-noise wide-band RF mixer and amplifier to balance the performance of multi-frequency supported down-conversion,specially designed LO distribution net to increase isolation between adjacent channels,and external band-pass filter to realize expected up-conversion frequencies,high maintenance and modular front-end generalpurpose design has been implemented.Results of standard parameters show an R2 value of at least 99.991%in the range of-60-10 dBm for linearity,up to 18 dBm for P1dB,and up to 89 dBc for cross talk between adjacent channels.The phase noise spectrum is lower than 80 dBc in the range of 0-1 MHz;cumulative phase noise is 0.006°;and amplitude and phase stability are 0.022%and 0.034°,respectively.

Polyphase Filter Banks for Embedded Sample Rate Changes in Digital Radio Front-Ends

This paper presents efficient processing engines for software-defined radio （SDR） front-ends. These engines, based on a polyphase channelizer, perform arbitrary sample-rate changes, frequency selection, and bandwidth control. This paper presents an M-path polyphase filter bank based on a modified N-path polyphase filter. Such a system allows resampling by arbitrary ratios while performing baseband aliasing from center frequencies at Nyquist zones that are not multiples of the output sample rate. This resampling technique is based on sliding cyclic data load interacting with cyclic-shifted coefficients. A non-maximally-decimated polyphase filterbank （where the number of data loads is not equal to the number of M subfilters） processes M subfilters in a time period that is less than or greater than the M data loads. A polyphase filter bank with five different resampling modes is used as a case study for embedded resamp/ing in SDR front-ends. These modes are （i） maximally decimated, （ii） Under-decimated, （iii） over-decimated, and combined up- and down-sampling with （iv） single stride length, and （v） multiple stride lengths. These modes can be used to obtain any required rational sampling rate change in an SDR front-end based on a polyphase channelizer. They can also be used for translation to and from arbitrary center frequencies that are unrelated to the output sample rates.

A tunable passive mixer for SAW-less front-end with reconfigurable voltage conversion gain and intermediate frequency bandwidth

An adjustable mixer for surface acoustic wave( SAW)-less radio frequency( RF) front-end is presented in this paper. Through changing the bias voltage,the presented mixer with reconfigurable voltage conversion gain( VCG) is suitable for multi-mode multi-standard( MMMS) applications. An equivalent local oscillator( LO) frequency-tunable high-Q band-pass filter( BPF) at low noise amplifier( LNA) output is used to reject the out-of-band interference signals. Base-band( BB) capacitor of the mixer is variable to obtain 15 kinds of intermediate frequency( IF) bandwidth( BW). The proposed passive mixer with LNA is implemented in TSMC 0. 18μm RF CMOS process and operates from 0. 5 to 2. 5 GHz with measured maximum out-of-band rejection larger than 40 d B. The measured VCG of the front-end can be changed from 5 to 17 d B; the maximum input intercept point( IIP3) is0 d Bm and the minimum noise figure( NF) is 3. 7 d B. The chip occupies an area of 0. 44 mm^2 including pads.

An Analog Front End for Recording Neuronal Activity in Freely Behaving Small Animals

Extracting characteristic brain signals and simultaneous recording animals behaving could help us to understand the complex behavior of neuronal ensembles. Here, a system was established to record local field potentials (LFP) and extracellular signal or multiple-unit discharge and behavior synchronously by utilizing electrophysiology and integrated circuit technique. It comprised microelectrodes and micro-driver assembly, analog front end (AFE),while a computer (Pentium III ) was used as the platform for the graphic user interface, which was developed using the LabVIEW programming language. It was designed as a part of ongoing research to develop a portable wireless neural signal recording system. We believe that this information will be useful for the research of brain-computer interface.

Design of a Low-Noise Front-End Readout CSP-Shaper System for CZT Detectors

This paper describes a low-noise front-end readout circuit for CZT detectors based on TSMC 0.35 um mixed-single CMOS technology;mainly analyzes the noise model of the detector-preamplifier and presents the low-noise circuit schematic of charge sensitive preamplifier and shaper. Considering the parasitical influences, the circuit and layout-design are optimized to reduce noise. The preliminary simulation results show that, the equivalent noise charge (ENC) is 74 e﹣ (rms), noise slope is 9 e﹣/pF, power consumption is 2 mW, and non-linearity

Upgrade to the front-end electronics of the BESⅢ muon identification system

Resistive Plate Chambers(RPCs) built from a new type of Bakelite developed at Institute of High Energy Physics(IHEP),Chinese Academy of Sciences have been used in the BESⅢ Muon identification system for several years without linseed oil coating,but characteristic aging performances were observed.To adapt to the RPCs in the aging state,the front-end electronics have been upgraded by enhancing the front-end protection,improving the threshold setting circuit,and separating power supplies of the comparator and the field programmable gate array(FPGA).Improvements in system stability,front-end protection and threshold consistency have been achieved.In this paper,the system upgrade and the test results are described in detail.

The front-end electronics design of dose monitors for beam delivery system of Shanghai Advanced Proton Therapy Facility

A front-end electronics of dose monitor has been developed for measuring irradiation dose to the patient in Shanghai Advanced Proton Therapy Facility.The parallel plate ionization chamber is used for the dose monitoring.Unlike the traditional method of recycling capacitor integration and voltage-to-frequency conversion,this dose monitor electronics uses the trans-impedance amplifier and analog-to-digital conversion method.It performs satisfactorily,with the integral nonlinearity of less than ±0.04 nA in the range of-400 to 50 nA and the resolution of about±0.6 nA.

A versatile 16-channel front-end integrated circuit for semiconductor radiation detectors

A CMOS front-end integrated circuit consisting of 16 identical analog channels is proposed for semiconductor radiation detectors. Each of the 16 channels has a low noise charge sensitive amplifier, a pulse shaper, a peak detect and hold circuit and a discriminator, while analog voltage and channel address are routed off the chip. It can accommodate both electron and hole collection with selectable gain and peaking time. Sequential and sparse readout, combining with self-trigger and external trigger, makes four readout modes. The circuit is implemented in a 0.35 μm DP4M (double-poly-quad-metal) CMOS technology with an area of 2.5×1.54 mm2 and power dissipation of 60 mW. A single channel chip is tested with Verigy 93000. The gain is adjustable from 13 to 130 mV·fC–1 while the peaking time varies between 0.7 and 1.6 μs. The linearity is more than 99% and the equivalent noise charge is about 600e.

Front-end signal analysis of the transverse feedback system for SSRF

Multi-bunch instabilities degrade beam quality through increased beam emittance,energy spread and even cause beam loss.A feedback system is used to suppress multi-bunch instabilities associated with resistive wall of the beam ducts,cavity-like structures,and trapped ions.A digital TFS (Transverse Feedback System) is in construction at the SSRF (Shanghai Synchrotron Radiation Facility),which is based on the latest generation of FPGA (Field Programmable Gate Array) processor.Before we get such FPGA disital board,investigation and simulation of the front-end were done in the first place.The signal flow was analyzed by SystemView.Construction and optimization of the entire system is our next goal.

Vacuum joints of dispersion-strengthened copper and its applications in synchrotron radiation front end

Masks are critical elements of synchrotron radiation front end that are exposed to high temperature and stress.The absorber material is typically comprised of dispersion-strengthened copper,which can retain high performance at elevated temperature.Joining processes under vacuum,including brazing and electron beam welding,are novel approaches for prolonging the absorber and for reducing power densities.The mechanical properties of brazed joints and electron beam welded joints of dispersion-strengthened copper workpieces are evaluated by tensile testing at 20,100,and 200 C.The testing results indicate that the tensile strength and elongation of both vacuum joints decrease with increasing temperature.Compared to brazed joints,electron beam welded joints have higher tensile strength,better ductility,and more stable performance.A novel welded mask with a total length of 600 mm is presented and shown to be practical for use in the highest heat load front end in the Shanghai synchrotron radiation facility phase-Ⅱ beamline project.

Study of Reducing Non-Ideal Effects Based on TiN Sensitive Electrode with Front-End Offset Circuit

The structure of the extended gate ion sensitive field effect transistor (EGISFET) is similar to the structure of the ion sensitive field effect transistor (ISFET).Moreover,the non-ideal effect of EGISFET is the main impediment to development of commercial processes for sensitive devices.It is necessary to promote the stability and reliability of the devices by employing calibration circuits and the better fabrication conditions.The temporal drift exists in the entire measurement experiment. Furthermore,in this study we can reduce the temporal drift effect which influences the stability of the TiN sensitive electrode with the differential front-end offset circuit.The measurement system combines with shifting circuit,differential and instrument amplifiers.We employ the calibration circuit to compare with the variations of the output voltage,and expectably improve the stability and reliability of the TiN sensitive electrode by the novel calibration circuit.

An Antenna Diversity Scheme for Digital Front-End with OFDM Technology

In,this paper, we propose a new antenna diversity scheme for OFDM-based wireless communication and digital broadcasting applications. Compared with existing schemes, such as post-fast Fourier transform （FFT）, pre-FFT, and polyphase-based fitter-bank, the proposed scheme performs optimally and has very low computational complexity. It offers a better compromise between performance, power consumption, and complexity in real-time implementation of the receivers of broadband communication and digital broadcasting systems.

A Broadband T/R Front-End of Millimeter Wave Holographic Imaging

A broadband T/R frond-end of active holographic imaging system is presented. Compact autodyne mode circuit structure front-end is adopted to achieve higher signal to noise ratio and higher reliability, which is beneficial to the after-end imagining. The factors that influence the dynamic range and the transverse resolution ratio of holographic imaging system have been analyzed. Wide-band oscillator, wide-band low noise amplifier and the tapered slot antennas are implemented to meet the requirements of the holographic imagining system. According to the measured results, the output power is uniform in the broadband working frequency. The sub-harmonic suppression is better than 25 dBc from the frequency of 28 GHz to 33 GHz. The isolation between antennas channel is greater than 20 dB. The experimental result shows that the performance of the front-end is good enough to meet the needs of active millimeter-wave holographic imaging system.

Design of a Low-Noise Front-End Readout Circuit for CdZnTe Detectors

In this paper, the design of a novel low-noise front-end readout circuit for Cadmium zinc telluride (CdZnTe) X-ray and γ-ray detectors is described. The front-end readout circuits include the charge sensitive amplifier (CSA) and the CR-RC shaper is implemented in TSMC 0.35 μm mixed-signal CMOS technology. The die size of the prototype chip is 4.9 mm × 2.2 mm. The simulation results show that, the noise performance is 46 electrons + 10 electrons/pF, and power consumption is 1.65 mW per channel.

Design of a Novel Front-End Readout ASIC for PET Imaging System

The architecture of a multi-channel front-end system is important for realizing a high-resolution PET system. We propose a novel front-end readout electronic system with TDC to deal with time information for PET system which can easily design the timing control. Each channel consists of a charge preamplifier, slow/fast shaper, discriminator and an analog memory. There are an ADC and a TDC to process the energy information and time information for each channel at the same time. In this paper, the whole system signals flow is all simulated by MATLAB. The simulation results show that the proposed system can process slender current from the detector and achieve the energy and time information. The proposed architecture can be applied to high-resolution PET imaging systems with multi-channel ASICs.