Design of a Novel Front-End Readout ASIC for PET Imaging System

The architecture of a multi-channel front-end system is important for realizing a high-resolution PET system. We propose a novel front-end readout electronic system with TDC to deal with time information for PET system which can easily design the timing control. Each channel consists of a charge preamplifier, slow/fast shaper, discriminator and an analog memory. There are an ADC and a TDC to process the energy information and time information for each channel at the same time. In this paper, the whole system signals flow is all simulated by MATLAB. The simulation results show that the proposed system can process slender current from the detector and achieve the energy and time information. The proposed architecture can be applied to high-resolution PET imaging systems with multi-channel ASICs.

Design of a Low-Noise Front-End Readout Circuit for CdZnTe Detectors

In this paper, the design of a novel low-noise front-end readout circuit for Cadmium zinc telluride (CdZnTe) X-ray and γ-ray detectors is described. The front-end readout circuits include the charge sensitive amplifier (CSA) and the CR-RC shaper is implemented in TSMC 0.35 μm mixed-signal CMOS technology. The die size of the prototype chip is 4.9 mm × 2.2 mm. The simulation results show that, the noise performance is 46 electrons + 10 electrons/pF, and power consumption is 1.65 mW per channel.

Design of a Low-Noise Front-End Readout CSP-Shaper System for CZT Detectors

This paper describes a low-noise front-end readout circuit for CZT detectors based on TSMC 0.35 um mixed-single CMOS technology;mainly analyzes the noise model of the detector-preamplifier and presents the low-noise circuit schematic of charge sensitive preamplifier and shaper. Considering the parasitical influences, the circuit and layout-design are optimized to reduce noise. The preliminary simulation results show that, the equivalent noise charge (ENC) is 74 e﹣ (rms), noise slope is 9 e﹣/pF, power consumption is 2 mW, and non-linearity

Threshold-independent method for single-shot readout of spin qubits in semiconductor quantum dots

The single-shot readout data process is essential for the realization of high-fidelity qubits and fault-tolerant quantum algorithms in semiconductor quantum dots. However, the fidelity and visibility of the readout process are sensitive to the choice of the thresholds and limited by the experimental hardware. By demonstrating the linear dependence between the measured spin state probabilities and readout visibilities along with dark counts, we describe an alternative threshold-independent method for the single-shot readout of spin qubits in semiconductor quantum dots. We can obtain the extrapolated spin state probabilities of the prepared probabilities of the excited spin state through the threshold-independent method. We then analyze the corresponding errors of the method, finding that errors of the extrapolated probabilities cannot be neglected with no constraints on the readout time and threshold voltage. Therefore, by limiting the readout time and threshold voltage, we ensure the accuracy of the extrapolated probability. We then prove that the efficiency and robustness of this method are 60 times larger than those of the most commonly used method. Moreover, we discuss the influence of the electron temperature on the effective area with a fixed external magnetic field and provide a preliminary demonstration for a single-shot readout of up to 0.7K/1.5T in the future.

Low-power SiPM readout BETA ASIC for space applications

The BETA application-specific integrated circuit(ASIC)is a fully programmable chip designed to amplify,shape and digitize the signal of up to 64 Silicon photomultiplier(SiPM)channels,with a power consumption of approximately~1 mW/channel.Owing to its dual-path gain,the BETA chip is capable of resolving single photoelectrons(phes)with a signal-to-noise ratio(SNR)>5 while simultaneously achieving a dynamic range of~4000 phes.Thus,BETA can provide a cost-effective solution for the readout of SiPMs in space missions and other applications with a maximum rate below 10 kHz.In this study,we describe the key characteristics of the BETA ASIC and present an evaluation of the performance of its 16-channel version,which is implemented using 130 nm technology.The ASIC also contains two discriminators that can provide trigger signals with a time jitter down to 400 ps FWHM for 10 phes.The linearity error of the charge gain measurement was less than 2%for a dynamic range as large as 15 bits.

Design and prototyping of the readout electronics for the transition radiation detector in the high energy cosmic radiation detection facility

The high energy cosmic-radiation detection(HERD)facility is planned to launch in 2027 and scheduled to be installed on the China Space Station.It serves as a dark matter particle detector,a cosmic ray instrument,and an observatory for high-energy gamma rays.A transition radiation detector placed on one of its lateral sides serves dual purpose,(ⅰ)calibrating HERD's electromagnetic calorimeter in the TeV energy range,and(ⅱ)serving as an independent detector for high-energy gamma rays.In this paper,the prototype readout electronics design of the transition radiation detector is demonstrated,which aims to accurately measure the charge of the anodes using the SAMPA application specific integrated circuit chip.The electronic performance of the prototype system is evaluated in terms of noise,linearity,and resolution.Through the presented design,each electronic channel can achieve a dynamic range of 0–100 fC,the RMS noise level not exceeding 0.15 fC,and the integral nonlinearity was<0.2%.To further verify the readout electronic performance,a joint test with the detector was carried out,and the results show that the prototype system can satisfy the requirements of the detector's scientific goals.

Studies of an event-building algorithm of the readout system for the twin TPCs in HFRS

The High-energy Fragment Separator(HFRS),which is currently under construction,is a leading international radioactive beam device.Multiple sets of position-sensitive twin time projection chamber(TPC)detectors are distributed on HFRS for particle identification and beam monitoring.The twin TPCs'readout electronics system operates in a trigger-less mode due to its high counting rate,leading to a challenge of handling large amounts of data.To address this problem,we introduced an event-building algorithm.This algorithm employs a hierarchical processing strategy to compress data during transmission and aggregation.In addition,it reconstructs twin TPCs'events online and stores only the reconstructed particle information,which significantly reduces the burden on data transmission and storage resources.Simulation studies demonstrated that the algorithm accurately matches twin TPCs'events and reduces more than 98%of the data volume at a counting rate of 500 kHz/channel.

Quantum generative adversarial networks based on a readout error mitigation method with fault tolerant mechanism

Readout errors caused by measurement noise are a significant source of errors in quantum circuits,which severely affect the output results and are an urgent problem to be solved in noisy-intermediate scale quantum(NISQ)computing.In this paper,we use the bit-flip averaging(BFA)method to mitigate frequent readout errors in quantum generative adversarial networks(QGAN)for image generation,which simplifies the response matrix structure by averaging the qubits for each random bit-flip in advance,successfully solving problems with high cost of measurement for traditional error mitigation methods.Our experiments were simulated in Qiskit using the handwritten digit image recognition dataset under the BFA-based method,the Kullback-Leibler(KL)divergence of the generated images converges to 0.04,0.05,and 0.1 for readout error probabilities of p=0.01,p=0.05,and p=0.1,respectively.Additionally,by evaluating the fidelity of the quantum states representing the images,we observe average fidelity values of 0.97,0.96,and 0.95 for the three readout error probabilities,respectively.These results demonstrate the robustness of the model in mitigating readout errors and provide a highly fault tolerant mechanism for image generation models.

Development of front-end readout electronics for silicon strip detectors

Front-end readout electronics have been developed for silicon strip detectors at our institute. In this system an Application Specific Integrated Circuit （ASIC） ATHED is used to realize multi-channel energy and time measurements. The slow control of ASIC chips is achieved by parallel port and the timing control signals of ASIC chips are implemented with the CPLD. The data acquisition is carried out with a PXI-DAQ card. The software has a user-friendly GUI developed with LabWindows/CVI in the Windows XP operating system. The test results show that the energy resolution is about 1.14% for alpha at 5.48 MeV and the maximum channel crosstalk of the system is 4.60%. The performance of the system is very reliable and is suitable for nuclear physics experiments.

Ultra-low Power CMOS Front-End Readout ASIC for Portable Digital Radiation Detector

An ultra-low power complementary metal-oxide-semiconductor （CMOS） front-end readout ASIC was developed for a portable digital radiation detector. The ASIC having a charge sensitive amplifier and a semi-Gaussian pulse-shaper was produced using the CSMC 0.5 μm DPDM process. The ENC noise of 363 e at 0 pF with a noise slope of 23 e/pF complies with the stringent low noise requirements. The peaking time was 250 ns at a 100 mV/fC conversion gain （detector capacitance is 20 pF）. By operating this frontend readout ASIC in the weak inversion region, the ultra-low power dissipation is only 0.1 mW/channel （3.0 V） Simulations and test results suggest that this design gives lower power consumption than the front-end readout ASICs working in the strong inversion and is appropriate for the portable digital radiation detectors.

Design of a high-dynamic-range prototype readout system for VLAST calorimeter

In the future, the Very Large Area gamma-ray Space Telescope is expected to observe high-energy electrons and gamma rays in the MeV to TeV range with unprecedented acceptance. As part of the detector suite, a high-energy imaging calorimeter(HEIC) is currently being developed as a homogeneous calorimeter that utilizes long bismuth germanate(BGO) scintillation crystals as both absorbers and detectors. To accurately measure the energy deposition in the BGO bar of HEIC, a highdynamic-range readout method using a silicon photomultiplier(SiPM) and multiphotodiode(PD) with different active areas has been proposed. A prototype readout system that adopts multichannel charge measurement ASICs was also developed to read out the combined system of SiPMs and PDs. Preliminary tests confirmed the feasibility of the readout scheme, which is expected to have a dynamic range close to 10~6.

Advances in nuclear detection and readout techniques

“A Craftsman Must Sharpen His Tools to Do His Job,”said Confucius.Nuclear detection and readout techniques are the foundation of particle physics,nuclear physics,and particle astrophysics to reveal the nature of the universe.Also,they are being increasingly used in other disciplines like nuclear power generation,life sciences,environmental sciences,medical sciences,etc.The article reviews the short history,recent development,and trend of nuclear detection and readout techniques,covering Semiconductor Detector,Gaseous Detector,Scintillation Detector,Cherenkov Detector,Transition Radiation Detector,and Readout Techniques.By explaining the principle and using examples,we hope to help the interested reader underst and this research field and bring exciting information to the community.

Edims: an event-driven internal memory synchronized readout prototype ASIC chip developed for HFRS-TPC

HFRS(HIAF FRagment Separator) will be the radioactive secondary beam separation line on High-Intensity heavy-ion Accelerator Facility(HIAF) in China. Several TPC detectors, with high count rates, are planned for particle identification and beam monitoring at HFRS. This paper presents an event-driven internal memory and synchronous readout(EDIMS)prototype ASIC chip. The aim is to provide HFRS-TPC with high-precision time and charge measurements with high count rates and a large dynamic range. The first prototype EDIMS chip integrated 16 channels and is fabricated using a 0.18-μm CMOS process. Each channel consists of a charge-sensitive amplifier, fast shaper, slow shaper, peak detect-and-hold circuit, discriminator with time-walk compensation, analog memory, and FIFO. The token ring is used for clock-synchronous readout. The chip is taped and tested.

FPGA Optimized Accelerator of DCNN with Fast Data Readout and Multiplier Sharing Strategy

With the continuous development of deep learning,Deep Convolutional Neural Network(DCNN)has attracted wide attention in the industry due to its high accuracy in image classification.Compared with other DCNN hard-ware deployment platforms,Field Programmable Gate Array(FPGA)has the advantages of being programmable,low power consumption,parallelism,and low cost.However,the enormous amount of calculation of DCNN and the limited logic capacity of FPGA restrict the energy efficiency of the DCNN accelerator.The traditional sequential sliding window method can improve the throughput of the DCNN accelerator by data multiplexing,but this method’s data multiplexing rate is low because it repeatedly reads the data between rows.This paper proposes a fast data readout strategy via the circular sliding window data reading method,it can improve the multiplexing rate of data between rows by optimizing the memory access order of input data.In addition,the multiplication bit width of the DCNN accelerator is much smaller than that of the Digital Signal Processing(DSP)on the FPGA,which means that there will be a waste of resources if a multiplication uses a single DSP.A multiplier sharing strategy is proposed,the multiplier of the accelerator is customized so that a single DSP block can complete multiple groups of 4,6,and 8-bit signed multiplication in parallel.Finally,based on two strategies of appeal,an FPGA optimized accelerator is proposed.The accelerator is customized by Verilog language and deployed on Xilinx VCU118.When the accelerator recognizes the CIRFAR-10 dataset,its energy efficiency is 39.98 GOPS/W,which provides 1.73×speedup energy efficiency over previous DCNN FPGA accelerators.When the accelerator recognizes the IMAGENET dataset,its energy efficiency is 41.12 GOPS/W,which shows 1.28×−3.14×energy efficiency compared with others.

天文应用红外焦平面读出电路研究

成功设计了一款天文应用的640×512短波红外焦平面读出电路。由于红外天文观测具有极低背景辐射、光子通量低的特点,为了实现探测器的高信噪比,需要降低器件的暗电流和电路噪声。电路采用有效的功耗管理策略,在保证电路正常工作的前提下尽可能地降低电路功耗以减小电路辉光对器件暗电流的影响。同时,研究非破坏性读出的数字功能,实现了超长的积分时间和信号的多帧累积,并作为一种斜坡采样的策略有效地降低读出噪声。短波HgCdTe焦平面的测试结果符合理论设计预期,开启电路非破坏性读出功能,设置6 000 s的积分时间,当电路功耗调低至14.04 mW时暗电流为0.9 e-·pixel^(-1)·s^(-1)。读出噪声在两档增益下分别为50 e-(10 fF)和27 e-(5 fF),非线性度低于0.1%。

基于磁性传感器的低失调温度补偿接口电路设计

面向磁性传感器在物联网(IoT)技术中的广泛应用,该文基于180 nm CMOS工艺设计了一种具有低失调电压,低温度漂移特性的霍尔传感器接口电路。针对霍尔传感器灵敏度的温度漂移特性,该文设计了一种感温电路并与查表法相结合,调节可编程增益放大器(PGA)的增益有效地降低了霍尔传感器的温度系数(TC)。在此基础上,通过在信号主通路中使用相关双采样(CDS)技术,极大程度上消除了霍尔传感器的失调电压。仿真结果表明,在–40°C~125°C温度范围内,霍尔传感器的TC从966.4 ppm/°C减小到了58.1 ppm/°C。信号主通路的流片结果表明,霍尔传感器的失调电压从25 mV左右减小到了4 mV左右,霍尔传感器的非线性误差为0.50%。芯片的总面积为0.69 mm^(2)。

面向行星表面元素测量的小型化伽马谱仪原理样机设计

对行星表面物质受宇宙射线激发或天然衰变而产生的伽马射线进行探测,是一种测量行星表面主要元素成分及其空间分布的可靠技术手段,已被多个行星探测任务采用。提出了将CZT探测器与SiPM读出闪烁晶体相结合的行星元素伽马谱仪方案,该方案兼具低能段的高能量分辨率和高能段的高探测效率,同时可以减小来自非探测方向伽马背景的影响,且具有较小的体积、重量和功耗。为进行初步的技术路线验证,设计了一个将CZT阵列(单个灵敏尺寸1 cm×1 cm×0.5 cm)与BGO探测器(晶体的主体尺寸8.4 cm×8.4 cm×4 cm)相结合的小型化伽马谱仪原理样机,并开展了物理模拟。完成了前端探测器模块、数据处理模块和FPGA控制逻辑的设计实现,以及原理样机的组装。使用放射源、上海光源激光伽马光束线和中子激发伽马对谱仪进行了测试,CZT探测器对^(137)Cs@662 keV伽马射线的能量分辨率(FWHM)为2.1%,可以较好地分辨低能伽马射线,BGO晶体能够较好地探测和分辨高能伽马射线。该方案为未来小型化行星伽马谱仪的工程设计提供了参考。

基于自研ASIC芯片HEPS中硅微条探测器读出电子学原型系统设计与测试

时间分辨X射线粉末衍射技术是探测物质晶体结构及其演变的重要手段。单光子计数型硅微条探测器因其灵敏度高和死时间低,在高能同步辐射光源(HEPS)的X射线粉末衍射实验中发挥着重要作用。研制适用于单光子计数型一维硅微条探测器的专用ASIC读出芯片(SSDROC)及其读出电子学系统,并采用一种新标定方法解决了SSDROC各通道对同一输入输出响应不一致的问题,该方法可显著提高各通道数据一致性并减小衍射实验数据的统计误差。探测器完成各项性能测试,结果表明整体系统线性优秀、能量分辨能力强、噪声低以及计数率高,为将来大覆盖角度一维硅微条探测器系统研制奠定坚实基础。

消除CDS折叠效应的增益自适应红外焦平面读出电路

高动态范围是红外焦平面探测技术的先进发展方向之一。高集成度像元读出电路的动态范围受到小电荷存储容量和噪声的限制。所设计的增益自适应像元读出电路,小信号下为电容反馈跨阻放大器(CTIA),大信号下自动转换为变阻抗电阻反馈跨阻放大器(RTIA),实现小信号大增益、大信号小增益的自动切换,将集成3.86 fF积分电容的CTIA电荷容量拓展到1.63 Me^(–)。在15μm像元中心距的像元内集成相关双采样(CDS)结构,大幅减小噪声。对CDS大信号注入产生的折叠效应进行理论分析,并设计抗折叠结构。采用180 nm 3.3V CMOS工艺,完成640×512规模的读出电路的设计、仿真、流片、测试。测试结果显示,该电路可消除CDS折叠效应,噪声电子数17 e^(–),动态范围拓展到99.66 dB。

高光谱应用的带可调复位时间CDS的低噪声红外焦平面读出电路

低辐射量的高光谱应用对红外焦平面读出电路(ROIC)提出了低噪声的设计要求。相关双采样(CDS)是常用的减少噪声的结构。本文通过调节钳位和采样保持之间的时间间隔来改进CDS,可灵活消除低频噪声。采用180 nm CMOS工艺设计和制造了640×512规模、15μm像元中心距的读出电路。输入级集成了低噪声CTIA与本文提出的可调复位时间CDS(AICDS),所设计的时序产生器使CDS复位时间可以延长0~270个时钟周期。通过延长复位时间减少这个时间间隔,噪声电子数可以由39 e^(-)减少到18.3 e^(-)。SPECTRE仿真结果和实验测试结果证实了提出的AICDS结构可以提升高光谱应用读出电路的噪声性能,因此可以广泛应用。