Poly-Si TFTs integrated gate driver circuit with charge-sharing structure

A p-type low-temperature poly-Si thin film transistors(LTPS TFTs) integrated gate driver using 2 nonoverlapped clocks is proposed.This gate driver features charge-sharing structure to turn off buffer TFT and suppresses voltage feed-through effects.It is analyzed that the conventional gate driver suffers from waveform distortions due to voltage uncertainty of internal nodes for the initial period.The proposed charge-sharing structure also helps to suppress the unexpected pulses during the initialization phases.The proposed gate driver shows a simple circuit,as only 6 TFTs and 1 capacitor are used for single-stage,and the buffer TFT is used for both pulling-down and pulling-up of output electrode.Feasibility of the proposed gate driver is proven through detailed analyses.Investigations show that voltage bootrapping can be maintained once the bootrapping capacitance is larger than0.8 pF,and pulse of gate driver outputs can be reduced to 5μs.The proposed gate driver can still function properly with positive V_(TH)shift within 0.4 V and negative V_(TH) shift within-1.2 V and it is robust and promising for high-resolution display.

A New Active Gate Driver for MOSFET to Suppress Turn-Off Spike and Oscillation

MOSFETs are widely used in power electronics converters.Due to the high di/dt and dv/dt of the MOSFET and parasitic parameters in the circuit,drain voltage spikes and oscillations will be generated during turn-off,which can affect the safety of the device and degrade the system's electromagnetic compatibility.This paper first studies the relationship between drain voltage spike and gate voltage during turn-off.Based on the effect of gate voltage on drain voltage spike,a new active gate driver that optimizes gate voltage is proposed.The proposed active gate driver detects the slope of the drain voltage and generates a positive pulse in the drain current fall phase to increase the gate voltage,thereby suppressing drain voltage spike and oscillation.In order to verify the effectiveness of the proposed active gate driver,a simulation circuit and an experimental platform are constructed and compared with the conventional gate driver.Simulation and experimental results show that the new active gate driver can effectively suppress the drain voltage spike and oscillation of MOSFETs,and can effectively reduce high-frequency EMI.

A large-current, highly integrated switched-capacitor divider with a dual-branch interleaved topology and light load efficiency improvement

Because it is magnet-free and can achieve a high integration level,the switched-capacitor(SC)converter acting as a direct current transformer has many promising applications in modern electronics.However,designing an SC converter with large current capability and high power efficiency is still challenging.This paper proposes a dual-branch SC voltage divider and presents its integrated circuit(IC)implementation.The designed SC converter is capable of driving large current load,thus widening the use of SC converters to high-power applications.This SC converter has a constant conversion ratio of 1/2 and its dual-branch interleaved operation ensures a continuous input current.An effective on-chip gate-driving method using a capacitively coupled floating-voltage level shifter is proposed to drive the all-NMOS power train.Due to the self-powered structure,the flying capacitor itself is also a bootstrap capacitor for gate driving and thus reduces the number of needed components.A digital frequency modulation method is adopted and the switching frequency decreases automatically at light load to improve light load efficiency.The converter IC is implemented using a 180 nm triple-well BCD process.Experimental results verify the effectiveness of the dual-branch interleaved operation and the self-powered gate-driving method.The proposed SC divider can drive up to 4 A load current with 5–12 V input voltage and its power efficiency is as high as 96.5%.At light load,using the proposed optimization method,the power efficiency is improved by 30%.

Modular Design Method for Motor Drives

This paper introduces the concept of modular design methodology for hardware design and development of motor drives.The modular design process is first introduced separating the hardware development into three parts:controller,mother board and phase-leg module.The control and circuit function can be decoupled from the phase-leg module development.The hardware update can be simplified with the phase-leg module development and verification.Two design examples are used to demonstrate this method:a DC-fed motor drive with Si IGBTs and an AC-fed motor drive with SiC devices.Design of DC-fed motor drive aims at developing the converter with customized IGBT package for high temperature.Experience with development of the converter with commercial IGBTs simplifies the process.As the AC-fed motor drive is a more complex topology using more advanced devices,the modular design method can simplify and improve the development especially for new packaged devices.Also,the modular design method can help to study the electromagnetic interference(EMI)issue for motor drives,which is presented with an extra design example.