A flexible field programmable gate array based radar signal processor is presented. The radar signal processor mainly consists of five functional modules: radar system timer, binary phase coded pulse compression(PC...A flexible field programmable gate array based radar signal processor is presented. The radar signal processor mainly consists of five functional modules: radar system timer, binary phase coded pulse compression(PC), moving target detection (MTD), constant false alarm rate (CFAR) and target dots processing. Preliminary target dots information is obtained in PC, MTD, and CFAR modules and Nios I! CPU is used for target dots combination and false sidelobe target removing. Sys- tem on programmable chip (SOPC) technique is adopted in the system in which SDRAM is used to cache data. Finally, a FPGA-based binary phase coded radar signal processor is realized and simula- tion result is given.展开更多
A simulation method to simulate the pseudorandom code P. M PP radar' s echo signal is proposed that makes use of the pre-generated Doppler simulation data, according to the relative movement parameter of the radar an...A simulation method to simulate the pseudorandom code P. M PP radar' s echo signal is proposed that makes use of the pre-generated Doppler simulation data, according to the relative movement parameter of the radar and the target. It resolves the problem of the high precision distance simulation and the high speed digital shift phase. At the same time, the radar dynamic digital video frequency target signal simulator is designed. Simulation results of the critical unit and the output waveform are given. The result of the test satisfies the system's request.展开更多
Satellite signal simulator for global navigation satellite system(GNSS)can evaluate the accuracy of capturing,tracing and positioning of GNSS receiver.It has significant use-value in the military and civil fields.The ...Satellite signal simulator for global navigation satellite system(GNSS)can evaluate the accuracy of capturing,tracing and positioning of GNSS receiver.It has significant use-value in the military and civil fields.The system adopts the overall design scheme of digital signal processor(DSP)and field-programmable gate array(FPGA).It consists of four modules:industrial control computer simulation software,mid-frequency signal generator,digital-to-analog(D/A)module and radio frequency(RF)module.In this paper,we test the dynamic performance of simulator using the dynamic scenes testing method,and the signal generated by the designed simulator is primarily validated.展开更多
The outstanding advantage of digital signal processing (DSP) techniques and Field Programmable Gate Array (FPGA) technology is capable of improving the quality of the experimental measurements for nuclear radiation. I...The outstanding advantage of digital signal processing (DSP) techniques and Field Programmable Gate Array (FPGA) technology is capable of improving the quality of the experimental measurements for nuclear radiation. In this article, a compact DMCA 8 K was designed and manufactured using DSP technique based on FPGA technology. In particular, the output of the preamplifier is completely processed by digital techniques which are obtained from the analog-to-digital converter (ADC) to calculate the baseline, DC offset, energy peaks, pile up, threshold discrimination and then the form of energy spectrum. The Spartan-6 board is used as a hardware for the development of the digital multichannel analyzer (DMCA), which is equipped with the 14-bit AD6645 with 62.5 Msps sample rate. The application software for instrument control, data acquisition and data processing was written under C++ builder via the RS-232 interface. The designed DMCA system has been tested with a HPGe detector using gamma sources of 60Co and 137Cs and a reference pulser.展开更多
Two-dimensional DC and small-signal analysis of gate-to-source scaling effects in SiC-based high-power field-effect transistors have been performed in this paper. The simulation results show that a downscaling of gate...Two-dimensional DC and small-signal analysis of gate-to-source scaling effects in SiC-based high-power field-effect transistors have been performed in this paper. The simulation results show that a downscaling of gate-to-source distance can improve device performance, i.e. enhancing drain current, transconductance, and maximum oscillation frequency. This is associated with the peculiar dynamic of electrons in SiC MESFETs, which lead to a linear velocity regime in the source access region. The variations of gate-to-source capacitance, gate-to-drain capacitance, and cut-off frequency with respect to the change in gate-to-source length have also been studied in detail.展开更多
在当前图像采集领域高分辨率、高帧率的要求下,移动产业处理器接口(Mobile Industry Processor Interface,MIPI)协议成为主流的高速图像数据传输协议。基于MIPI协议,采用IMX214图像传感器,通过自主设计图像数据采集板,满足4通道高速差...在当前图像采集领域高分辨率、高帧率的要求下,移动产业处理器接口(Mobile Industry Processor Interface,MIPI)协议成为主流的高速图像数据传输协议。基于MIPI协议,采用IMX214图像传感器,通过自主设计图像数据采集板,满足4通道高速差分信号传输,提出一种高速图像传感器数据采集电路的设计方案。使用现场可编程逻辑门阵列(Field Programmable Gate Array,FPGA)对图像传感器进行驱动控制与协议解析。测试结果表明,所设计的Verilog代码能够正确配置图像传感器的寄存器,并完成工作模式切换、字节串并转换、包头解析与格式转换等步骤,最终获得原始图像数据。展开更多
基金Supported by the Ministerial Level Advanced Research Foundation (SP240012)
文摘A flexible field programmable gate array based radar signal processor is presented. The radar signal processor mainly consists of five functional modules: radar system timer, binary phase coded pulse compression(PC), moving target detection (MTD), constant false alarm rate (CFAR) and target dots processing. Preliminary target dots information is obtained in PC, MTD, and CFAR modules and Nios I! CPU is used for target dots combination and false sidelobe target removing. Sys- tem on programmable chip (SOPC) technique is adopted in the system in which SDRAM is used to cache data. Finally, a FPGA-based binary phase coded radar signal processor is realized and simula- tion result is given.
文摘A simulation method to simulate the pseudorandom code P. M PP radar' s echo signal is proposed that makes use of the pre-generated Doppler simulation data, according to the relative movement parameter of the radar and the target. It resolves the problem of the high precision distance simulation and the high speed digital shift phase. At the same time, the radar dynamic digital video frequency target signal simulator is designed. Simulation results of the critical unit and the output waveform are given. The result of the test satisfies the system's request.
基金Shanxi Provincial Science and Technology Research Fund(No.2012021013-6)
文摘Satellite signal simulator for global navigation satellite system(GNSS)can evaluate the accuracy of capturing,tracing and positioning of GNSS receiver.It has significant use-value in the military and civil fields.The system adopts the overall design scheme of digital signal processor(DSP)and field-programmable gate array(FPGA).It consists of four modules:industrial control computer simulation software,mid-frequency signal generator,digital-to-analog(D/A)module and radio frequency(RF)module.In this paper,we test the dynamic performance of simulator using the dynamic scenes testing method,and the signal generated by the designed simulator is primarily validated.
文摘The outstanding advantage of digital signal processing (DSP) techniques and Field Programmable Gate Array (FPGA) technology is capable of improving the quality of the experimental measurements for nuclear radiation. In this article, a compact DMCA 8 K was designed and manufactured using DSP technique based on FPGA technology. In particular, the output of the preamplifier is completely processed by digital techniques which are obtained from the analog-to-digital converter (ADC) to calculate the baseline, DC offset, energy peaks, pile up, threshold discrimination and then the form of energy spectrum. The Spartan-6 board is used as a hardware for the development of the digital multichannel analyzer (DMCA), which is equipped with the 14-bit AD6645 with 62.5 Msps sample rate. The application software for instrument control, data acquisition and data processing was written under C++ builder via the RS-232 interface. The designed DMCA system has been tested with a HPGe detector using gamma sources of 60Co and 137Cs and a reference pulser.
基金This work was supported by the Major State Basic Research Development Program of China, under Contract 51327010101.
文摘Two-dimensional DC and small-signal analysis of gate-to-source scaling effects in SiC-based high-power field-effect transistors have been performed in this paper. The simulation results show that a downscaling of gate-to-source distance can improve device performance, i.e. enhancing drain current, transconductance, and maximum oscillation frequency. This is associated with the peculiar dynamic of electrons in SiC MESFETs, which lead to a linear velocity regime in the source access region. The variations of gate-to-source capacitance, gate-to-drain capacitance, and cut-off frequency with respect to the change in gate-to-source length have also been studied in detail.