The application of a gate voltage to control the superconducting current flowing through a nanoscale superconducting constriction,named as gate-controlled supercurrent(GCS),has raised great interest for fundamental an...The application of a gate voltage to control the superconducting current flowing through a nanoscale superconducting constriction,named as gate-controlled supercurrent(GCS),has raised great interest for fundamental and technological reasons.To gain a deeper understanding of this effect and develop superconducting technologies based on it,the material and physical parameters crucial for the GCS effect must be identified.Top-down fabrication protocols should also be optimized to increase device scalability,although studies suggest that top-down fabricated devices are more resilient to show a GCS.Here,we investigate gated superconducting nanobridges made with a top-down fabrication process from thin films of the noncentrosymmetric superconductor niobium rhenium with varying ratios of the constituents(NbRe).Unlike other devices previously reported and made with a top-down approach,our NbRe devices systematically exhibit a GCS effect when they were fabricated from NbRe thin films with small grain size and etched in specific conditions.These observations pave the way for the realization of top-down-made GCS devices with high scalability.Our results also imply that physical parameters like structural disorder and surface physical properties of the nanobridges,which can be in turn modified by the fabrication process,are crucial for a GCS observation,providing therefore also important insights into the physics underlying the GCS effect.展开更多
High-voltage controller area network(CAN)buses have a harsh working environment and require a robust electrostatic discharge(ESD)design window.Thus,ordinary silicon-controlled rectifier(SCR)devices do not satisfy thes...High-voltage controller area network(CAN)buses have a harsh working environment and require a robust electrostatic discharge(ESD)design window.Thus,ordinary silicon-controlled rectifier(SCR)devices do not satisfy these design requirements.To streamline the design and manufacturing of SCRs,this study proposes a novel dual-gate dual-direction SCR(DG-DDSCR)with a high failure current and holding voltage.First,four polysilicon gates,GateA1,GateA2,GateC1,and GateC2,were introduced to the N+and P+middle regions of the anode and cathode.When the voltage acts on the anode,the electric field generated by the polysilicon gate strengthens the SCR current path while promoting the release of ESD current in the substrate path.Specifically,the holding voltage of the DG-DDSCR and failure current derived from the test results of a transmission line pulse(TLP)are 29.4 V and 16.7 A,respectively.When the clamping voltage was 40 V,the transient current release of the structure can reach 11.61 A,which met the specifications of the CAN bus ESD window and was suitable for the ESD protection of the target application.展开更多
The flash memory technology meets physical and technical obstacles in further scaling. New structures and new materials are implemented as possible solutions. This paper focuses on two kinds of new flash cells for hig...The flash memory technology meets physical and technical obstacles in further scaling. New structures and new materials are implemented as possible solutions. This paper focuses on two kinds of new flash cells for high density and low power memory applications based on the vertical channel double gate structure. The proposed VD-NROM with dual-nitride-trapping-layer and vertical structure can achieve four-bit-per-cell storage capability. And the proposed VSAS-FG cell benefits the high programming efficiency, low power and high density capability, which can be realized without any additional mask and can achieve the self-alignment of the split-gate channel and the floating-gate. The two novel flash cell structures can be considered as potential candidates for different flash memory applications.展开更多
In light of fabricating resonant tunneling diode(RTD),in this paper a GaAs-based resonant tunneling transistor with gate structure(GRTT)has been designed and fabricated successfully.A systematic depiction centers on t...In light of fabricating resonant tunneling diode(RTD),in this paper a GaAs-based resonant tunneling transistor with gate structure(GRTT)has been designed and fabricated successfully.A systematic depiction centers on the designs of material structure,device structure,photo-lithography mask,fabrication of device and the measurement and analysis of parameters.The fabricated GRTT has a maximum PVCR of 46 and a maximum transconductance of 8 mS.The work lays the foundation for further improve-ment on the performance and parameters of RTT.展开更多
基金the European Union’s Horizon 2020 Research and Innovation Program under Grant Agreement No.964398(SuperGate)the US ONR(Nos.N00014-21-1-2879,N00014-20-1-2442,and N00014-23-1-2866).
文摘The application of a gate voltage to control the superconducting current flowing through a nanoscale superconducting constriction,named as gate-controlled supercurrent(GCS),has raised great interest for fundamental and technological reasons.To gain a deeper understanding of this effect and develop superconducting technologies based on it,the material and physical parameters crucial for the GCS effect must be identified.Top-down fabrication protocols should also be optimized to increase device scalability,although studies suggest that top-down fabricated devices are more resilient to show a GCS.Here,we investigate gated superconducting nanobridges made with a top-down fabrication process from thin films of the noncentrosymmetric superconductor niobium rhenium with varying ratios of the constituents(NbRe).Unlike other devices previously reported and made with a top-down approach,our NbRe devices systematically exhibit a GCS effect when they were fabricated from NbRe thin films with small grain size and etched in specific conditions.These observations pave the way for the realization of top-down-made GCS devices with high scalability.Our results also imply that physical parameters like structural disorder and surface physical properties of the nanobridges,which can be in turn modified by the fabrication process,are crucial for a GCS observation,providing therefore also important insights into the physics underlying the GCS effect.
基金National Natural Science Foundation of China(62174052).
文摘High-voltage controller area network(CAN)buses have a harsh working environment and require a robust electrostatic discharge(ESD)design window.Thus,ordinary silicon-controlled rectifier(SCR)devices do not satisfy these design requirements.To streamline the design and manufacturing of SCRs,this study proposes a novel dual-gate dual-direction SCR(DG-DDSCR)with a high failure current and holding voltage.First,four polysilicon gates,GateA1,GateA2,GateC1,and GateC2,were introduced to the N+and P+middle regions of the anode and cathode.When the voltage acts on the anode,the electric field generated by the polysilicon gate strengthens the SCR current path while promoting the release of ESD current in the substrate path.Specifically,the holding voltage of the DG-DDSCR and failure current derived from the test results of a transmission line pulse(TLP)are 29.4 V and 16.7 A,respectively.When the clamping voltage was 40 V,the transient current release of the structure can reach 11.61 A,which met the specifications of the CAN bus ESD window and was suitable for the ESD protection of the target application.
文摘The flash memory technology meets physical and technical obstacles in further scaling. New structures and new materials are implemented as possible solutions. This paper focuses on two kinds of new flash cells for high density and low power memory applications based on the vertical channel double gate structure. The proposed VD-NROM with dual-nitride-trapping-layer and vertical structure can achieve four-bit-per-cell storage capability. And the proposed VSAS-FG cell benefits the high programming efficiency, low power and high density capability, which can be realized without any additional mask and can achieve the self-alignment of the split-gate channel and the floating-gate. The two novel flash cell structures can be considered as potential candidates for different flash memory applications.
基金supported by the Ultra-High Speed ASIC Key Laboratory Foundation.
文摘In light of fabricating resonant tunneling diode(RTD),in this paper a GaAs-based resonant tunneling transistor with gate structure(GRTT)has been designed and fabricated successfully.A systematic depiction centers on the designs of material structure,device structure,photo-lithography mask,fabrication of device and the measurement and analysis of parameters.The fabricated GRTT has a maximum PVCR of 46 and a maximum transconductance of 8 mS.The work lays the foundation for further improve-ment on the performance and parameters of RTT.