A comparison study of on-chip short pulse generation circuits based on a coplanar waveguide

A few traditional pulse-forming circuits are implemented in a commercial 0.13 μm digital complementary-metal-oxide-semiconductor （CMOS） technology. These circuits, based on a coplanar waveguide, are analyzed and compared through CadenceTM Spectre simulations. The results show that these traditional pulse-forming-line （PFL） based circuits can be implemented in standard CMOS technology for short pulse generations. Further work is needed to explore the potential of the circuit techniques and to minimize parasitic effects.

Pseudo-Random Test Generation for Large Combinational Circuits

In this paper,a simulation system of pseudo-random testing is described first to investigate the characteristics of pseudo-random testing.Several interesting experimental results are obtained.It is found out that initial states of pseudo-random sequences have little effect on fault coverage.Fixed connection between LFSR outputs and circuit inputs in which the number of LFSR stages m is less than the number of circuit inputs n leads to low fault coverage,and the fault coverage is reduced as m decreases.The local unrandomness of pseudo-random sequences is exposed clearly.Generally,when an LFSR is employed as a pseudo-random generator,there are at least as many LFSR stages as circuit inputs.However,for large circuits under test with hundreds of inputs,there are drawbacks of using an LFSR with hundreds of stages.In the paper,a new design for a pseudo-random pattern generator is proposed in which m<n.The relationship between test length and the number of LFSR stages is discussed in order to obtain necessary,fault coverage.It is shown that the design cannot only save LFSR hardware but also reduce test length without loss of fault coverage,and is easy to implement. The experimental results are provided for the 10 Benchmark Circuits to show the effectiveness of the generator.

A Complete Critical Path Algorithm for Test Generation of Combinational Circuits

It is known that critical path test generation method is not a complete algorithm for combinational circuits with reconvergent-fanout.In order to make it a complete algorithm,we put forward a reconvergent-fanout- oriented technique,the principal critical path algorithm,propagating the critical value back to primary inputs along a single path,the principal critical path,and allowing multiple path sensitization if needed.Relationship among test patterns is also discussed to accelerate test generation.

Fast key generation for Gentry-style homomorphic encryption

The key issue of original implementation for Gentry-style homomorphic encryption scheme is the so called slow key generation algorithm. Ogura proposed a key generation algorithm for Gentry-style somewhat homomorphic scheme that controlled the bound of the evaluation circuit depth by using the relation between the evaluation circuit depth and the eigenvalues of the primary matrix. However, their proposed key generation method seems to exclude practical application. In order to address this problem, a new key generation algorithm based on Gershgorin circle theorem was proposed. The authors choose the eigenvalues of the primary matrix from a desired interval instead of selecting the module. Compared with the Ogura＇s work, the proposed key generation algorithm enables one to create a more practical somewhat homomorphic encryption scheme. Furthermore, a more aggressive security analysis of the approximate shortest vector problem（SVP） against lattice attacks is given. Experiments indicate that the new key generation algorithm is roughly twice as efficient as the previous methods.