A fast-locking, low-jitter, phase-locked loop (PLL) with a simple phase-frequency detector is proposed. The phase-frequency detector is composed of only two XOR gates. It simultaneously achieves low jitter and short...A fast-locking, low-jitter, phase-locked loop (PLL) with a simple phase-frequency detector is proposed. The phase-frequency detector is composed of only two XOR gates. It simultaneously achieves low jitter and short locking time. The voltage-controlled oscillator within the PLL consists of four-stage ring oscillators which are coupled to each other and oscillate with the same frequency and a phase shift of 45. The PLL is fabricated in 0. 1Stem CMOS technology. The measured phase noise of the PLL output at 500kHz offset from the 5GHz center frequency is - 102.6dBc/Hz. The circuit exhibits a capture range of 280MHz and a low RMS jitter of 2.06ps. The power dissipation excluding the output buffers is only 21.6roW at a 1.8V supply.展开更多
In order to improve the performance of the existing phase frequency detectors (PFDs), a systematical analysis of the existing PFDs is presented. Based on the circuit architecture, both classifications and comparison...In order to improve the performance of the existing phase frequency detectors (PFDs), a systematical analysis of the existing PFDs is presented. Based on the circuit architecture, both classifications and comparisons are made. A new robust CMOS phase frequency detector for a high speed and low jitter charge pump phrase-locked loop (PLL) is designed. The proposed PFD consists of two rising-edge triggered dynamic D flip-flops, two positive-edge detectors and delaying units and two OR gates. It adopts two reset mechanisms to avoid the LIP and DN signals to be logic-1 simultaneously. Thus, any current mismatch of the charge pump circuit will not worsen the performance of the PLL. Furthermore, it has hardly any dead-zone phenomenon in phase characteristic. Simulations with ADS are performed based on a TSMC 0. 18-μm CMOS process with a 1.8-V supply voltage. According to the theoretical analyses and simulation results, the proposed PFD shows a satisfactory performance with a high operation frequency (≈ 1 GHz), a wide phase-detection range [ ± 2π], a near zero dead-zone ( 〈 0. 1 ps), high reliability, low phase jitter, low power consumption ( ≈100 μW) and small circuit complexity.展开更多
Based on 0.13μm complementary metal-oxide-semiconductor(CMOS) technology,a phase and frequency detector(PFD) is designed with a low supply voltage of 0.5V for frequency synthesizers used in wireless sensor netwo...Based on 0.13μm complementary metal-oxide-semiconductor(CMOS) technology,a phase and frequency detector(PFD) is designed with a low supply voltage of 0.5V for frequency synthesizers used in wireless sensor networks(WSNs).The PFD can compare the frequency and phase differences of input signals and deliver a signal voltage proportional to the difference.Low threshold transistors are used in the circuits since a power supply of 0.5V is adopted.A pulse latched structure is also used in the circuits in order to increase both the detection range of phase errors and the maximum operation frequency.In experiments,a phase error with a range from-358° to 358° is measured when the input signal frequency is 2MHz.The PFD has a faster acquisition speed compared with conventional digital PFDs.When the input signals are at a frequency of 2MHz with zero phase error,the circuits have a power consumption of 1.8[KG*8]μW,and the maximum operation frequency is 1.25GHz.展开更多
Recently,a Rydberg atom-based mixer was developed to measure the phase of a radio frequency(RF)field.The phase of the signal RF(SIG RF)field is down-converted directly to the phase of a beat signal created by the pres...Recently,a Rydberg atom-based mixer was developed to measure the phase of a radio frequency(RF)field.The phase of the signal RF(SIG RF)field is down-converted directly to the phase of a beat signal created by the presence of a local RF(LO RF)field.In this study,we propose that the Rydberg atom-based mixer can be converted to an all-optical phase detector by amplitude modulation(AM)of the LO RF field;that is,the phase of the SIG RF field is related to both the amplitude and phase of the beat signal.When the AM frequency of the LO RF field is the same as the frequency of the beat signal,the beat signal will further interfere with the AM of the LO RF field inside the atom,and then the amplitude of the beat signal is related to the phase of the SIG RF field.The amplitude of the beat signal and the phase of the SIG RF field show a linear relationship within the range of 0 toπ/2 when the phase of the AM is set with a differenceπ/4 from the phase of the LO RF field.The minimum phase resolution can be as small as 0.6°by optimizing the experimental conditions according to a simple theoretical model.This study will expand and contribute to the development of RF measurement devices based on Rydberg atoms.展开更多
A real time system used to detect phase difference between two sinusoidal signals is proposed in this paper. The system is designed to process the phase signal of the far-infrared (FIR) hydrogen cyanide (HCN) inte...A real time system used to detect phase difference between two sinusoidal signals is proposed in this paper. The system is designed to process the phase signal of the far-infrared (FIR) hydrogen cyanide (HCN) interferometer on J-TEXT. It is based on zero-crossing detection and makes use of the digital circuit. Compared with a traditional zero-crossing phase detector, it doesn't need to sacrifice the time resolution to expand the phase range. The phase difference is divided into two parts, the integer part and the fraction part. In each detecting cycle, they are detected separately. It outputs digital signals that are more stable for transmission. A prototype was built on J-TEXT using discrete components. A practical method is proposed to deal with the counting error caused by the deviation of electronic components in manufacture. Reasonable results were obtained on the prototype. The phase resolution reaches 2π/64 in test, and can still be improved by raising the clock frequency.展开更多
The design and realization of a new generation of infra-red electronic distance measurement (IR EDM) system are presented.A DSP(Digital Signal Process) phase detector based on high speed analog-to-digital converter an...The design and realization of a new generation of infra-red electronic distance measurement (IR EDM) system are presented.A DSP(Digital Signal Process) phase detector based on high speed analog-to-digital converter and DSP technique has been designed,in order to improve the precision and reliability of IR EDM system.As a result,the EDM system developed with a DSP phase detector has a precision of 3 mm in the measuring range of 2 km.展开更多
In this paper, we proposed the scheme for a passive round-robin differential-phase-shift quantum key distribution(RRDPS-QKD) set-up based on the principle of Hong–Ou–Mandel interference. Our scheme requires two le...In this paper, we proposed the scheme for a passive round-robin differential-phase-shift quantum key distribution(RRDPS-QKD) set-up based on the principle of Hong–Ou–Mandel interference. Our scheme requires two legitimate parties to prepare their signal state with two different non-orthogonal bases instead of single in original protocol. Incorporating this characteristic, we establish the level of security of our protocol under the intercept-resend attack and demonstrate its detector-flaw-immune feature. Furthermore, we show that our scheme not only inherits the merit of better tolerance of bit errors and finite-sized-key effects but can be implemented using hardware similar to the measurement device independent QKD(MDI-QKD). This ensures good compatibility with the current commonly used quantum system.展开更多
In order to raise the detection precision of the extended binary phase shift keying (EBPSK) receiver, a detector based on the improved particle swarm optimization algorithm (IMPSO) and the BP neural network is des...In order to raise the detection precision of the extended binary phase shift keying (EBPSK) receiver, a detector based on the improved particle swarm optimization algorithm (IMPSO) and the BP neural network is designed. First, the characteristics of EBPSK modulated signals and the special filtering mechanism of the impacting filter are demonstrated. Secondly, an improved particle swarm optimization algorithm based on the logistic chaos disturbance operator and the Cauchy mutation operator is proposed, and the EBPSK detector is designed by utilizing the IMPSO-BP neural network. Finally, the simulation of the EBPSK detector based on the MPSO-BP neural network is conducted and the result is compared with that of the adaptive threshold-based decision, the BP neural network, and the PSO-BP detector, respectively. Simulation results show that the detection performance of the EBPSK detector based on the IMPSO-BP neural network is better than those of the other three detectors.展开更多
针对传统逐次逼近型模/数转换器(Successive Approximation Analog to Digital Converter,SAR ADC)中的电压域比较器存在延迟大、功耗高等问题,本文设计了一款应用于SAR ADC的低功耗时间域比较器。该比较器通过引入高增益的时间放大器(T...针对传统逐次逼近型模/数转换器(Successive Approximation Analog to Digital Converter,SAR ADC)中的电压域比较器存在延迟大、功耗高等问题,本文设计了一款应用于SAR ADC的低功耗时间域比较器。该比较器通过引入高增益的时间放大器(Time Amplifier,TA)成功实现了相位积累速度的指数级增加,有效减小了输入信号相位脱离鉴相器的“死区”所需的振荡周期数,缩短了比较延迟,优化了比较的速度和功耗。该比较器基于65 nm CMOS工艺进行设计,在0.4 V电源电压下功耗仅5.24 nW,失调电压为5.99 mV。展开更多
An automatic IQ phase calibration method implemented in a 2.4GHz direct conversion receiver is proposed. It uses a delay locked loop (DLL) with a proposed quadrature phase detector to greatly reduce the phase error....An automatic IQ phase calibration method implemented in a 2.4GHz direct conversion receiver is proposed. It uses a delay locked loop (DLL) with a proposed quadrature phase detector to greatly reduce the phase error. The receiver is fabricated in a 0.18μm CMOS process. Measurements show that the IQ phase error can be calibrated within 1°,which satisfies the system requirement.展开更多
文摘A fast-locking, low-jitter, phase-locked loop (PLL) with a simple phase-frequency detector is proposed. The phase-frequency detector is composed of only two XOR gates. It simultaneously achieves low jitter and short locking time. The voltage-controlled oscillator within the PLL consists of four-stage ring oscillators which are coupled to each other and oscillate with the same frequency and a phase shift of 45. The PLL is fabricated in 0. 1Stem CMOS technology. The measured phase noise of the PLL output at 500kHz offset from the 5GHz center frequency is - 102.6dBc/Hz. The circuit exhibits a capture range of 280MHz and a low RMS jitter of 2.06ps. The power dissipation excluding the output buffers is only 21.6roW at a 1.8V supply.
文摘In order to improve the performance of the existing phase frequency detectors (PFDs), a systematical analysis of the existing PFDs is presented. Based on the circuit architecture, both classifications and comparisons are made. A new robust CMOS phase frequency detector for a high speed and low jitter charge pump phrase-locked loop (PLL) is designed. The proposed PFD consists of two rising-edge triggered dynamic D flip-flops, two positive-edge detectors and delaying units and two OR gates. It adopts two reset mechanisms to avoid the LIP and DN signals to be logic-1 simultaneously. Thus, any current mismatch of the charge pump circuit will not worsen the performance of the PLL. Furthermore, it has hardly any dead-zone phenomenon in phase characteristic. Simulations with ADS are performed based on a TSMC 0. 18-μm CMOS process with a 1.8-V supply voltage. According to the theoretical analyses and simulation results, the proposed PFD shows a satisfactory performance with a high operation frequency (≈ 1 GHz), a wide phase-detection range [ ± 2π], a near zero dead-zone ( 〈 0. 1 ps), high reliability, low phase jitter, low power consumption ( ≈100 μW) and small circuit complexity.
基金The National High Technology Research and Development Program of China (863 Program) (No. 2007AA01Z2A7)Program for Special Talents in Six Fields of Jiangsu Province
文摘Based on 0.13μm complementary metal-oxide-semiconductor(CMOS) technology,a phase and frequency detector(PFD) is designed with a low supply voltage of 0.5V for frequency synthesizers used in wireless sensor networks(WSNs).The PFD can compare the frequency and phase differences of input signals and deliver a signal voltage proportional to the difference.Low threshold transistors are used in the circuits since a power supply of 0.5V is adopted.A pulse latched structure is also used in the circuits in order to increase both the detection range of phase errors and the maximum operation frequency.In experiments,a phase error with a range from-358° to 358° is measured when the input signal frequency is 2MHz.The PFD has a faster acquisition speed compared with conventional digital PFDs.When the input signals are at a frequency of 2MHz with zero phase error,the circuits have a power consumption of 1.8[KG*8]μW,and the maximum operation frequency is 1.25GHz.
基金Project supported by the National Key Research and Development Program of China(Grant Nos.2017YFA0304900 and 2017YFA0402300)the Beijing Natural Science Foundation(Grant No.1212014)+3 种基金the National Natural Science Foundation of China(Grant Nos.11604334,11604177,and U2031125)the Key Research Program of the Chinese Academy of Sciences(Grant No.XDPB08-3)the Open Research Fund Program of the State Key Laboratory of Low-Dimensional Quantum Physics(Grant No.KF201807)the Fundamental Research Funds for the Central Universities,and Youth Innovation Promotion Association CAS.
文摘Recently,a Rydberg atom-based mixer was developed to measure the phase of a radio frequency(RF)field.The phase of the signal RF(SIG RF)field is down-converted directly to the phase of a beat signal created by the presence of a local RF(LO RF)field.In this study,we propose that the Rydberg atom-based mixer can be converted to an all-optical phase detector by amplitude modulation(AM)of the LO RF field;that is,the phase of the SIG RF field is related to both the amplitude and phase of the beat signal.When the AM frequency of the LO RF field is the same as the frequency of the beat signal,the beat signal will further interfere with the AM of the LO RF field inside the atom,and then the amplitude of the beat signal is related to the phase of the SIG RF field.The amplitude of the beat signal and the phase of the SIG RF field show a linear relationship within the range of 0 toπ/2 when the phase of the AM is set with a differenceπ/4 from the phase of the LO RF field.The minimum phase resolution can be as small as 0.6°by optimizing the experimental conditions according to a simple theoretical model.This study will expand and contribute to the development of RF measurement devices based on Rydberg atoms.
基金supported by National Natural Science Foundation of China(Nos.11005043 and 11105056)
文摘A real time system used to detect phase difference between two sinusoidal signals is proposed in this paper. The system is designed to process the phase signal of the far-infrared (FIR) hydrogen cyanide (HCN) interferometer on J-TEXT. It is based on zero-crossing detection and makes use of the digital circuit. Compared with a traditional zero-crossing phase detector, it doesn't need to sacrifice the time resolution to expand the phase range. The phase difference is divided into two parts, the integer part and the fraction part. In each detecting cycle, they are detected separately. It outputs digital signals that are more stable for transmission. A prototype was built on J-TEXT using discrete components. A practical method is proposed to deal with the counting error caused by the deviation of electronic components in manufacture. Reasonable results were obtained on the prototype. The phase resolution reaches 2π/64 in test, and can still be improved by raising the clock frequency.
文摘The design and realization of a new generation of infra-red electronic distance measurement (IR EDM) system are presented.A DSP(Digital Signal Process) phase detector based on high speed analog-to-digital converter and DSP technique has been designed,in order to improve the precision and reliability of IR EDM system.As a result,the EDM system developed with a DSP phase detector has a precision of 3 mm in the measuring range of 2 km.
基金Project supported by the Fund from the State Key Laboratory of Information Photonics and Optical Communications(Beijing University of Posts and Telecommunications)(Grant No.IPOC2017ZT0)
文摘In this paper, we proposed the scheme for a passive round-robin differential-phase-shift quantum key distribution(RRDPS-QKD) set-up based on the principle of Hong–Ou–Mandel interference. Our scheme requires two legitimate parties to prepare their signal state with two different non-orthogonal bases instead of single in original protocol. Incorporating this characteristic, we establish the level of security of our protocol under the intercept-resend attack and demonstrate its detector-flaw-immune feature. Furthermore, we show that our scheme not only inherits the merit of better tolerance of bit errors and finite-sized-key effects but can be implemented using hardware similar to the measurement device independent QKD(MDI-QKD). This ensures good compatibility with the current commonly used quantum system.
基金The National Natural Science Foundation of China (No.60872075)the National High Technology Research and Development Program of China (863 Program) (No. 2008AA01Z227)
文摘In order to raise the detection precision of the extended binary phase shift keying (EBPSK) receiver, a detector based on the improved particle swarm optimization algorithm (IMPSO) and the BP neural network is designed. First, the characteristics of EBPSK modulated signals and the special filtering mechanism of the impacting filter are demonstrated. Secondly, an improved particle swarm optimization algorithm based on the logistic chaos disturbance operator and the Cauchy mutation operator is proposed, and the EBPSK detector is designed by utilizing the IMPSO-BP neural network. Finally, the simulation of the EBPSK detector based on the MPSO-BP neural network is conducted and the result is compared with that of the adaptive threshold-based decision, the BP neural network, and the PSO-BP detector, respectively. Simulation results show that the detection performance of the EBPSK detector based on the IMPSO-BP neural network is better than those of the other three detectors.
文摘针对传统逐次逼近型模/数转换器(Successive Approximation Analog to Digital Converter,SAR ADC)中的电压域比较器存在延迟大、功耗高等问题,本文设计了一款应用于SAR ADC的低功耗时间域比较器。该比较器通过引入高增益的时间放大器(Time Amplifier,TA)成功实现了相位积累速度的指数级增加,有效减小了输入信号相位脱离鉴相器的“死区”所需的振荡周期数,缩短了比较延迟,优化了比较的速度和功耗。该比较器基于65 nm CMOS工艺进行设计,在0.4 V电源电压下功耗仅5.24 nW,失调电压为5.99 mV。
文摘An automatic IQ phase calibration method implemented in a 2.4GHz direct conversion receiver is proposed. It uses a delay locked loop (DLL) with a proposed quadrature phase detector to greatly reduce the phase error. The receiver is fabricated in a 0.18μm CMOS process. Measurements show that the IQ phase error can be calibrated within 1°,which satisfies the system requirement.