New reconfigurable computing architectures are introduced to overcome some of the limitations of conventional microprocessors and fine-grained reconfigurable devices (e.g., FPGAs). One of the new promising architect...New reconfigurable computing architectures are introduced to overcome some of the limitations of conventional microprocessors and fine-grained reconfigurable devices (e.g., FPGAs). One of the new promising architectures axe Configurable System-on-Chip (CSoC) solutions. They were designed to offer high computational performance for real-time signal processing and for a wide range of applications exhibiting high degrees of parallelism. The programming of such systems is an inherently challenging problem due to the lack of an programming model. This paper describes a novel heterogeneous system architecture for signal processing and data streaming applications. It offers high computational performance and a high degree of flexibility and adaptability by employing a micro Task Controller (mTC) unit in conjunction with programmable and configurable hardware. The hierarchically organized architecture provides a programming model, allows an efficient mapping of applications and is shown to be easy scalable to future VLSI technologies. Several mappings of commonly used digital signal processing algorithms for future telecommunication and multimedia systems and implementation results axe given for a standard-cell ASIC design realization in 0.18 micron 6-layer UMC CMOS technology.展开更多
In Internet of Things(IoT), the devices or terminals are connected with each other, which can be very diverse over the wireless networks. Unfortunately, the current devices are not designed to communicate with the col...In Internet of Things(IoT), the devices or terminals are connected with each other, which can be very diverse over the wireless networks. Unfortunately, the current devices are not designed to communicate with the collocated devices which employ different communication technologies. Consequently, the communication between these devices will be realized only by using the gateway nodes. This will cause the inefficient use of wireless resources. Therefore, in this paper, a smart service system(SSS) architecture is proposed, which consists of smart service terminal(SST), and smart service network(SSN), to realize the Io T in a general environment with diverse communication networks, devices, and services. The proposed architecture has the following advantages: i) the devices in this architecture cover multiple types of terminals and sensor-actuator devices; ii) the communications network therein is a converged network, and will coordinate multiple kinds of existing and emerging networks. This converged network offers ubiquitous access for various sensors and terminals; iii) the architecture has services and applications covering all smart service areas. It also provides theadaptability to new services and applications. A SSS architecture-based smart campus system was developed and deployed. Evaluation experiments of the proposed smart campus system demonstrate the SSS's advantages over the existing counterparts, and verify the effectiveness of the proposed architecture.展开更多
文摘New reconfigurable computing architectures are introduced to overcome some of the limitations of conventional microprocessors and fine-grained reconfigurable devices (e.g., FPGAs). One of the new promising architectures axe Configurable System-on-Chip (CSoC) solutions. They were designed to offer high computational performance for real-time signal processing and for a wide range of applications exhibiting high degrees of parallelism. The programming of such systems is an inherently challenging problem due to the lack of an programming model. This paper describes a novel heterogeneous system architecture for signal processing and data streaming applications. It offers high computational performance and a high degree of flexibility and adaptability by employing a micro Task Controller (mTC) unit in conjunction with programmable and configurable hardware. The hierarchically organized architecture provides a programming model, allows an efficient mapping of applications and is shown to be easy scalable to future VLSI technologies. Several mappings of commonly used digital signal processing algorithms for future telecommunication and multimedia systems and implementation results axe given for a standard-cell ASIC design realization in 0.18 micron 6-layer UMC CMOS technology.
基金supported by the national 973 project of China under Grants 2013CB329104the Natural Science Foundation of China under Grants 61372124, 61427801+1 种基金the Natural Science Foundation of the Jiangsu Higher Education Institutions (Grant No.13KJB520029)the Jiangsu Province colleges and universities graduate students scientific research and innovation program CXZZ13_0477,NUPTSF(Grant No.NY214033)
文摘In Internet of Things(IoT), the devices or terminals are connected with each other, which can be very diverse over the wireless networks. Unfortunately, the current devices are not designed to communicate with the collocated devices which employ different communication technologies. Consequently, the communication between these devices will be realized only by using the gateway nodes. This will cause the inefficient use of wireless resources. Therefore, in this paper, a smart service system(SSS) architecture is proposed, which consists of smart service terminal(SST), and smart service network(SSN), to realize the Io T in a general environment with diverse communication networks, devices, and services. The proposed architecture has the following advantages: i) the devices in this architecture cover multiple types of terminals and sensor-actuator devices; ii) the communications network therein is a converged network, and will coordinate multiple kinds of existing and emerging networks. This converged network offers ubiquitous access for various sensors and terminals; iii) the architecture has services and applications covering all smart service areas. It also provides theadaptability to new services and applications. A SSS architecture-based smart campus system was developed and deployed. Evaluation experiments of the proposed smart campus system demonstrate the SSS's advantages over the existing counterparts, and verify the effectiveness of the proposed architecture.