This paper presents a 50 Hz 15-bit analog-to-digital converter （ADC） for pixel-level implementation in CMOS image sensors. The ADC is based on charge packets counting and adopts a voltage reset technique to inject c...This paper presents a 50 Hz 15-bit analog-to-digital converter （ADC） for pixel-level implementation in CMOS image sensors. The ADC is based on charge packets counting and adopts a voltage reset technique to inject charge packets. The core circuit for charge/pulse conversion is specially optimized for low power, low noise and small area. An experimental chip with ten pixel-level ADCs has been fabricated and tested for verification. The measurement result shows a standard deviation of 1.8 LSB for full-scale output. The ADC has an area of 45 × 45μm^2 and consumes less than 2 μW in a standard 1P-6M 0.18μm CMOS process.展开更多
基金supported by the Major National Science & Technology Program of China(No.2012ZX03004004-002)
文摘This paper presents a 50 Hz 15-bit analog-to-digital converter （ADC） for pixel-level implementation in CMOS image sensors. The ADC is based on charge packets counting and adopts a voltage reset technique to inject charge packets. The core circuit for charge/pulse conversion is specially optimized for low power, low noise and small area. An experimental chip with ten pixel-level ADCs has been fabricated and tested for verification. The measurement result shows a standard deviation of 1.8 LSB for full-scale output. The ADC has an area of 45 × 45μm^2 and consumes less than 2 μW in a standard 1P-6M 0.18μm CMOS process.
