This paper addresses the challenges of System-on-Chip designs using High-Level Synthesis (HLS). HLS tools convert algorithms designed in C into hardware modules. This approach is a practical choice for developing comp...This paper addresses the challenges of System-on-Chip designs using High-Level Synthesis (HLS). HLS tools convert algorithms designed in C into hardware modules. This approach is a practical choice for developing complex applications. Nevertheless, certain hardware considerations are required when writing C applications for HLS tools. Hence, in order to demonstrate the fundamental hardware design concepts, a case studyis presented. Fast Fourier Transform (FFT) implementation in ANSI C is examined in order to explore the important design issues such as concurrency, data recurrences and memory accesses that need to be resolved before generating the hardware using HLS tools. There are additional language constraints that need to be addressed including use of pointers, recursion and floating point types.展开更多
Allocation is one of main tasks in the high-level synthesis. It includes module , functional unit allocation, storage allocation and interconnection allocation. This paper models the allocation problem as cluster anal...Allocation is one of main tasks in the high-level synthesis. It includes module , functional unit allocation, storage allocation and interconnection allocation. This paper models the allocation problem as cluster analysis and applies a new algorithm, neighbor state transition (NST) algorithm, for cluster optimization. It is proved that the algorithm produces an asymptotically global optimal solution with the upper bound on the cost function (1 + O(1/n)2-ε)F*, When F" is the cost of the optimum solution, n is the problem size and e is a positive parameter arbitrarily close to zero. The numerical examples show that the NST algorithm produces better results compared to the other known methods.展开更多
On board processing(OBP) satellite systems have obtained more and more attentions in recent years because of their high efficiency and performance.However,the OBP transponders are very sensitive to the high energy par...On board processing(OBP) satellite systems have obtained more and more attentions in recent years because of their high efficiency and performance.However,the OBP transponders are very sensitive to the high energy particles in the space radiation environments.Single event upset(SEU)is one of the major radiation effects,which influences the satellite reliability greatly.Triple modular redundancy(TMR) is a classic and efficient method to mask SEUs.However,TMR uses three identical modules and a comparison logic,the circuit size becomes unacceptable,especially in the resource limited environments such as OBP systems.Considering that,a new SEU-tolerant method based on residue code and high-level synthesis(HLS) is proposed,and the new method is applied to FIR filters,which are typical structures in the OBP systems.The simulation results show that,for an applicable HLS scheduling scheme,area reduction can be reduced by 48.26%compared to TMR,while fault missing rate is 0.15%.展开更多
This paper studies the linkage problem between the result of high-level synthesis and back-end technology, presents a method of high-level technology mapping based on knowl edge, and studies deeply all of its importan...This paper studies the linkage problem between the result of high-level synthesis and back-end technology, presents a method of high-level technology mapping based on knowl edge, and studies deeply all of its important links such as knowledge representation, knowledge utility and knowledge acquisition. It includes: (1) present a kind of expanded production about knowledge of circuit structure; (2) present a VHDL-based method to acquire knowledge of tech nology mapping; (3) provide solution control strategy and algorithm of knowledge utility; (4)present a half-automatic maintenance method, which can find redundance and contradiction of knowledge base; (5) present a practical method to embed the algorithm into knowledge system to decrease complexity of knowledge base. A system has been developed and linked with three kinds of technologies, so verified the work of this paper.展开更多
文摘This paper addresses the challenges of System-on-Chip designs using High-Level Synthesis (HLS). HLS tools convert algorithms designed in C into hardware modules. This approach is a practical choice for developing complex applications. Nevertheless, certain hardware considerations are required when writing C applications for HLS tools. Hence, in order to demonstrate the fundamental hardware design concepts, a case studyis presented. Fast Fourier Transform (FFT) implementation in ANSI C is examined in order to explore the important design issues such as concurrency, data recurrences and memory accesses that need to be resolved before generating the hardware using HLS tools. There are additional language constraints that need to be addressed including use of pointers, recursion and floating point types.
文摘Allocation is one of main tasks in the high-level synthesis. It includes module , functional unit allocation, storage allocation and interconnection allocation. This paper models the allocation problem as cluster analysis and applies a new algorithm, neighbor state transition (NST) algorithm, for cluster optimization. It is proved that the algorithm produces an asymptotically global optimal solution with the upper bound on the cost function (1 + O(1/n)2-ε)F*, When F" is the cost of the optimum solution, n is the problem size and e is a positive parameter arbitrarily close to zero. The numerical examples show that the NST algorithm produces better results compared to the other known methods.
基金Supported by the National S&T Major Project(No.2011ZX03003-003-01,2011ZX03004-004)the National Basic Research Program of China(No.2012CB316002)
文摘On board processing(OBP) satellite systems have obtained more and more attentions in recent years because of their high efficiency and performance.However,the OBP transponders are very sensitive to the high energy particles in the space radiation environments.Single event upset(SEU)is one of the major radiation effects,which influences the satellite reliability greatly.Triple modular redundancy(TMR) is a classic and efficient method to mask SEUs.However,TMR uses three identical modules and a comparison logic,the circuit size becomes unacceptable,especially in the resource limited environments such as OBP systems.Considering that,a new SEU-tolerant method based on residue code and high-level synthesis(HLS) is proposed,and the new method is applied to FIR filters,which are typical structures in the OBP systems.The simulation results show that,for an applicable HLS scheduling scheme,area reduction can be reduced by 48.26%compared to TMR,while fault missing rate is 0.15%.
文摘This paper studies the linkage problem between the result of high-level synthesis and back-end technology, presents a method of high-level technology mapping based on knowl edge, and studies deeply all of its important links such as knowledge representation, knowledge utility and knowledge acquisition. It includes: (1) present a kind of expanded production about knowledge of circuit structure; (2) present a VHDL-based method to acquire knowledge of tech nology mapping; (3) provide solution control strategy and algorithm of knowledge utility; (4)present a half-automatic maintenance method, which can find redundance and contradiction of knowledge base; (5) present a practical method to embed the algorithm into knowledge system to decrease complexity of knowledge base. A system has been developed and linked with three kinds of technologies, so verified the work of this paper.
