Plasma enhanced chemical vapor deposition of excellent a-Si：H passivation layers for a-Si：H/c-Si heterojunction solar cells at high pressure and high power

The intrinsic a-Si：H passivation layer inserted between the doped a-Si：H layer and the c-Si substrate is very crucial for improving the performance of the a-Si：H/c- Si heterojunction （SHJ） solar cell. The passivation performance of the a-Si：H layer is strongly dependent on its microstructure. Usually, the compact a-Si：H deposited near the transition from the amorphous phase to the nanocrystalline phase by plasma enhanced chemical vapor deposition （PECVD） can provide excellent passivation. However, at the low deposition pressure and low deposition power, such an a-Si：H layer can be only prepared in a narrow region. The deposition condition must be controlled very carefully. In this paper, intrinsic a- Si：H layers were prepared on n-type Cz c-Si substrates by 27.12 MHz PECVD at a high deposition pressure and high deposition power. The corresponding passivation perfor- mance on c-Si was investigated by minority carrier lifetime measurement. It was found that an excellent a-Si：H passivation layer could be obtained in a very wide deposition pressure and power region. Such wide process window would be very beneficial for improving the uniformity and the yield for the solar cell fabrication. The a-Si：H layer microstructure was further investigated by Raman and Fourier transform infrared （FTIR） spectro-scopy characterization. The correlation between the microstructure and the passivation performance was revealed. According to the above findings, the a-Si：H passivation performance was optimized more elaborately. Finally, a large-area SHJ solar cell with an efficiency of 22.25% was fabricated on the commercial 156 mm pseudo-square n-type Cz c-Si substrate with the opencircuit voltage （Voc） of up to 0.732 V.

Analysis of heating effect on the process of high deposition rate microcrystalline silicon

A possible heating effect on the process of high deposition rate microcrystalline silicon has been studied. It includes the discharge time-accumulating heating effect, discharge power, inter-electrode distance, and total gas flow rate induced heating effect. It is found that the heating effects mentioned above are in some ways quite similar to and in other ways very different from each other. However, all of them will directly or indirectly cause the increase of the substrate surface temperature during the process of depositing microcrystalline silicon thin films, which will affect the properties of the materials with increasing time. This phenomenon is very serious for the high deposition rate of microcrystalline silicon thin films because of the high input power and the relatively small inter-electrode distance needed. Through analysis of the heating effects occurring in the process of depositing microcrystalline silicon, it is proposed that the discharge power and the heating temperature should be as low as possible, and the total gas flow rate and the inter-electrode distance should be suitable so that device-grade high quality deposition rate microcrystalline silicon thin films can be fabricated.