引入上下文信息和Attention Gate的GUS-YOLO遥感目标检测算法

目前基于通用YOLO系列的遥感目标检测算法存在并未充分利用图像的全局上下文信息,在特征融合金字塔部分并未充分考虑缩小融合特征之间的语义鸿沟、抑制冗余信息干扰的缺点。在结合YOLO算法优点的基础上提出GUS-YOLO算法,其拥有一个能够充分利用全局上下文信息的骨干网络Global Backbone。除此之外,该算法在融合特征金字塔自顶向下的结构中引入Attention Gate模块,可以突出必要的特征信息,抑制冗余信息。另外,为Attention Gate模块设计了最佳的网络结构,提出了网络的特征融合结构U-Net。最后,为克服ReLU函数可能导致模型梯度不再更新的问题,该算法将Attention Gate模块的激活函数升级为可学习的SMU激活函数,提高模型鲁棒性。在NWPU VHR-10遥感数据集上,该算法相较于YOLOV7算法取得宽松指标mAP^(0.50)1.64个百分点和严格指标mAP^(0.75)9.39个百分点的性能提升。相较于目前主流的七种检测算法,该算法取得较好的检测性能。

Investigation of degradation and recovery characteristics of NBTI in 28-nm high-k metal gate process

Degradation induced by the negative bias temperature instability(NBTI)can be attributed to three mutually uncoupled physical mechanisms,i.e.,the generation of interface traps(ΔV_(IT)),hole trapping in pre-existing gate oxide defects(ΔV_(HT)),and the generation of gate oxide defects(ΔV_(OT)).In this work,the characteristic of NBTI for p-type MOSFET fabricated by using a 28-nm high-k metal gate(HKMG)process is thoroughly studied.The experimental results show that the degradation is enhanced at a larger stress bias and higher temperature.The effects of the three underlying subcomponents are evaluated by using the comprehensive models.It is found that the generation of interface traps dominates the NBTI degradation during long-time NBTI stress.Moreover,the NBTI parameters of the power-law time exponent and temperature activation energy as well as the gate oxide field acceleration are extracted.The dependence of operating lifetime on stress bias and temperature is also discussed.It is observed that NBTI lifetime significantly decreases as the stress increases.Furthermore,the decrease of charges related to interface traps and hole detrapping in pre-existing gate oxide defects are used to explain the recovery mechanism after stress.

High-performance chiral all-optical OR logic gate based on topological edge states of valley photonic crystal

For all-optical communication and information processing,it is necessary to develop all-optical logic gates based on photonic structures that can directly perform logic operations.All-optical logic gates have been demonstrated based on conventional waveguides and interferometry,as well as photonic crystal structures.Nonetheless,any defects in those structures will introduce high scattering loss,which compromises the fidelity and contrast ratio of the information process.Based on the spin-valley locking effect that can achieve defect-immune unidirectional transmission of topological edge states in valley photonic crystals(VPCs),we propose a high-performance all-optical logic OR gate based on a VPC structure.By tuning the working bandwidth of the two input channels,we prevent interference between the two channels to achieve a stable and high-fidelity output.The transmittance of both channels is higher than 0.8,and a high contrast ratio of 28.8 dB is achieved.Moreover,the chirality of the logic gate originated from the spin-valley locking effect allows using different circularly polarized light as inputs,representing“1”or“0”,which is highly desired in quantum computing.The device’s footprint is 18μm×12μm,allowing high-density on-chip integration.In addition,this design can be experimentally fabricated using current nanofabrication techniques and will have potential applications in optical communication,information processing,and quantum computing.

Gates joint locally connected network for accurate and robust reconstruction in optical molecular tomography

Optical molecular tomography(OMT)is a potential pre-clinical molecular imaging technique with applications in a variety of biomedical areas,which can provide non-invasive quantitative three-dimensional(3D)information regarding tumor distribution in living animals.The construction of optical transmission models and the application of reconstruction algorithms in traditional model-based reconstruction processes have affected the reconstruction results,resulting in problems such as low accuracy,poor robustness,and long-time consumption.Here,a gates joint locally connected network(GLCN)method is proposed by establishing the mapping relationship between the inside source distribution and the photon density on surface directly,thus avoiding the extra time consumption caused by iteration and the reconstruction errors caused by model inaccuracy.Moreover,gates module was composed of the concatenation and multiplication operators of three different gates.It was embedded into the network aiming at remembering input surface photon density over a period and allowing the network to capture neurons connected to the true source selectively by controlling three different gates.To evaluate the performance of the proposed method,numerical simulations were conducted,whose results demonstrated good performance in terms of reconstruction positioning accuracy and robustness.

Remote entangling gate between a quantum dot spin and a transmon qubit mediated by microwave photons

Spin qubits and superconducting qubits are promising candidates for realizing solid-state quantum information processors.Designing a hybrid architecture that combines the advantages of different qubits on the same chip is a highly desirable but challenging goal.Here we propose a hybrid architecture that utilizes a high-impedance SQUID array resonator as a quantum bus,thereby coherently coupling different solid-state qubits.We employ a resonant exchange spin qubit hosted in a triple quantum dot and a superconducting transmon qubit.Since this hybrid system is highly tunable,it can operate in a dispersive regime,where the interaction between the different qubits is mediated by virtual photons.By utilizing such interactions,entangling gate operations between different qubits can be realized in a short time of 30 ns with a fidelity of up to 96.5%under realistic parameter conditions.Further utilizing this interaction,remote entangled state between different qubits can be prepared and is robust to perturbations of various parameters.These results pave the way for exploring efficient fault-tolerant quantum computation on hybrid quantum architecture platforms.

Fake News Detection Based on Cross-Modal Message Aggregation and Gated Fusion Network

Social media has become increasingly significant in modern society,but it has also turned into a breeding ground for the propagation of misleading information,potentially causing a detrimental impact on public opinion and daily life.Compared to pure text content,multmodal content significantly increases the visibility and share ability of posts.This has made the search for efficient modality representations and cross-modal information interaction methods a key focus in the field of multimodal fake news detection.To effectively address the critical challenge of accurately detecting fake news on social media,this paper proposes a fake news detection model based on crossmodal message aggregation and a gated fusion network(MAGF).MAGF first uses BERT to extract cumulative textual feature representations and word-level features,applies Faster Region-based ConvolutionalNeuralNetwork(Faster R-CNN)to obtain image objects,and leverages ResNet-50 and Visual Geometry Group-19(VGG-19)to obtain image region features and global features.The image region features and word-level text features are then projected into a low-dimensional space to calculate a text-image affinity matrix for cross-modal message aggregation.The gated fusion network combines text and image region features to obtain adaptively aggregated features.The interaction matrix is derived through an attention mechanism and further integrated with global image features using a co-attention mechanism to producemultimodal representations.Finally,these fused features are fed into a classifier for news categorization.Experiments were conducted on two public datasets,Twitter and Weibo.Results show that the proposed model achieves accuracy rates of 91.8%and 88.7%on the two datasets,respectively,significantly outperforming traditional unimodal and existing multimodal models.

Aerial target threat assessment based on gated recurrent unit and self-attention mechanism

Aerial threat assessment is a crucial link in modern air combat, whose result counts a great deal for commanders to make decisions. With the consideration that the existing threat assessment methods have difficulties in dealing with high dimensional time series target data, a threat assessment method based on self-attention mechanism and gated recurrent unit(SAGRU) is proposed. Firstly, a threat feature system including air combat situations and capability features is established. Moreover, a data augmentation process based on fractional Fourier transform(FRFT) is applied to extract more valuable information from time series situation features. Furthermore, aiming to capture key characteristics of battlefield evolution, a bidirectional GRU and SA mechanisms are designed for enhanced features.Subsequently, after the concatenation of the processed air combat situation and capability features, the target threat level will be predicted by fully connected neural layers and the softmax classifier. Finally, in order to validate this model, an air combat dataset generated by a combat simulation system is introduced for model training and testing. The comparison experiments show the proposed model has structural rationality and can perform threat assessment faster and more accurately than the other existing models based on deep learning.

A gated recurrent unit model to predict Poisson’s ratio using deep learning

Static Poisson’s ratio(vs)is crucial for determining geomechanical properties in petroleum applications,namely sand production.Some models have been used to predict vs;however,the published models were limited to specific data ranges with an average absolute percentage relative error(AAPRE)of more than 10%.The published gated recurrent unit(GRU)models do not consider trend analysis to show physical behaviors.In this study,we aim to develop a GRU model using trend analysis and three inputs for predicting n s based on a broad range of data,n s(value of 0.1627-0.4492),bulk formation density(RHOB)(0.315-2.994 g/mL),compressional time(DTc)(44.43-186.9 μs/ft),and shear time(DTs)(72.9-341.2μ s/ft).The GRU model was evaluated using different approaches,including statistical error an-alyses.The GRU model showed the proper trends,and the model data ranges were wider than previous ones.The GRU model has the largest correlation coefficient(R)of 0.967 and the lowest AAPRE,average percent relative error(APRE),root mean square error(RMSE),and standard deviation(SD)of 3.228%,1.054%,4.389,and 0.013,respectively,compared to other models.The GRU model has a high accuracy for the different datasets:training,validation,testing,and the whole datasets with R and AAPRE values were 0.981 and 2.601%,0.966 and 3.274%,0.967 and 3.228%,and 0.977 and 2.861%,respectively.The group error analyses of all inputs show that the GRU model has less than 5% AAPRE for all input ranges,which is superior to other models that have different AAPRE values of more than 10% at various ranges of inputs.

A HybridManufacturing ProcessMonitoringMethod Using Stacked Gated Recurrent Unit and Random Forest

This study proposed a new real-time manufacturing process monitoring method to monitor and detect process shifts in manufacturing operations.Since real-time production process monitoring is critical in today’s smart manufacturing.The more robust the monitoring model,the more reliable a process is to be under control.In the past,many researchers have developed real-time monitoring methods to detect process shifts early.However,thesemethods have limitations in detecting process shifts as quickly as possible and handling various data volumes and varieties.In this paper,a robust monitoring model combining Gated Recurrent Unit(GRU)and Random Forest(RF)with Real-Time Contrast(RTC)called GRU-RF-RTC was proposed to detect process shifts rapidly.The effectiveness of the proposed GRU-RF-RTC model is first evaluated using multivariate normal and nonnormal distribution datasets.Then,to prove the applicability of the proposed model in a realmanufacturing setting,the model was evaluated using real-world normal and non-normal problems.The results demonstrate that the proposed GRU-RF-RTC outperforms other methods in detecting process shifts quickly with the lowest average out-of-control run length(ARL1)in all synthesis and real-world problems under normal and non-normal cases.The experiment results on real-world problems highlight the significance of the proposed GRU-RF-RTC model in modern manufacturing process monitoring applications.The result reveals that the proposed method improves the shift detection capability by 42.14%in normal and 43.64%in gamma distribution problems.

Upgrade and Renovation of Steel Billet Scalein front of High-speed Wire Furnace

This article briefly introduces the weighing device for steel billets in front of the heating furnace of the high-speed wire rod unit,and analyzes and summarizes the problems existing in the original weighing device for steel billets in production and use.Based on on-site installation conditions,design a new weighing method,match a large range weighing sensor,upgrade the automation control of the weighing device,and remotely transmit the billet weighing data to the MES system of the group.The automatic,stable,reliable,and accurate measurement of steel billet raw materials has been achieved,providing important guarantees for the accurate measurement of production line billet and product yield.

预测轴承寿命的gate递归单元特征融合域自适应模型

采用现有的数据驱动模型对不同工况下的轴承剩余使用寿命(RUL)进行预测时,精度会大幅下降。针对这一问题,提出了一种基于门控递归单元特征融合领域自适应(GFFDA)模型的轴承RUL预测方法。首先,采用信号分析方法对轴承振动信号进行了特征提取,并采用特征评价的方法选择出了5个最优特征,在最优特征的基础上,采用粒子群算法优化后的支持向量机的方法对轴承的健康阶段进行了划分;然后,选择目标域和源域退化阶段的最优特征子集作为GFFDA模型的输入,采用源域数据对特征提取器和寿命预测模块进行了预训练;最后,更新了目标特征提取器和寿命预测模块,对目标域的RUL进行了预测;并使用西安交通大学的轴承数据集对该GFFDA模型的有效性进行了验证。研究结果表明:相比于现有的数据驱动模型,GFFDA模型具有更好的跨工况分析能力和更出色的信息提取能力;同时,在对变工况的轴承寿命进行预测时,采用GFFDA模型具有更好的性能。

Dual Gate液晶显示屏栅极制程断路缺陷的分析与改善

文章探究了光刻工序的水汽和ITO刻蚀工序的药液结晶对DualGate产品栅极制程的断路影响,通过DOE试验得到影响因子的最佳改善条件,使55寸DualGate产品栅极制程的断路缺陷发生率整体降低36%,为公司带来80.2万元的月度收益,能够对其他高端产品断路缺陷的改善思路、新工艺设备的设计改进,提供参考。

Characteristics of high-quality HfSiON gate dielectric prepared by physical vapour deposition

This paper presents a method using simple physical vapour deposition to form high-quality hafnium silicon oxynitride （HfSiON） on ultrathin SiO2 buffer layer. The gate dielectric with 10A （1A = 0.1 nm） equivalent oxide thickness is obtained. The experimental results indicate that the prepared HfSiON gate dielectric exhibits good physical and electrical characteristics, including very good thermal stability up to 1000℃, excellent interface properties, high dielectric constant （k = 14） and low gate-leakage current （Ig = 1.9 × 10^-3 A/cm^2@Vg = Vfb - 1 V for EOT of 10 A）. TaN metal gate electrode is integrated with the HfSiON gate dielectric.The effective work function of TaN on HfSiON is 4.3 eV, meeting the requirements of NMOS for the metal gate. And, the impacts of sputtering ambient and annealing temperature on the electrical properties of HfSiON gate dielectric are investigated.

Phase control of magnetron sputtering deposited Gd_2O_3 thin films as high-κ gate dielectrics

Gd2O3 thin films as high-κ gate dielectrics were deposited directly on Si（001） substrates by magnetron sputtering at a pressure of 1.3 Pa and different temperatures. X-ray diffraction results revealed that all the films grown from 450 to 570 ℃ were crystalline, and the Gd2O3 thin films consisted of a mixture of cubic and monoclinic phases. The growth temperature was a critical parameter for the phase constituents and their relative amount. Low temperature was favorable for the formation of cubic phase while higher temperature gave rise to more monoclinic phase. All the Gd2O3 thin films grown from different temperatures exhibited acceptable electrical properties, such as low leakage current density （JL） of 10-5 A/cm^2 at zero bias with capacitance equivalent SiO2 thickness in the range of 6-13 nm. Through the comparison between films grown at 450 and 570 ℃, the existence of monoclinic phase caused an increase in JL by nearly one order of magnitude and a reduction of effective dielectric constant from 17 to 9.

Challenges in Atomic-Scale Characterization of High-k Dielectrics and Metal Gate Electrodes for Advanced CMOS Gate Stacks

The decreasing feature sizes in complementary metal-oxide semiconductor （CMOS） transistor technology will require the replacement of SiO2 with gate dielectrics that have a high dielectric constant （high-k） because as the SiO2 gate thickness is reduced below 1.4 nm, electron tunnelling effects and high leakage currents occur in SiO2, which present serious obstacles to future device reliability. In recent years significant progress has been made on the screening and selection of high-k gate dielectrics, understanding their physical properties, and their integration into CMOS technology. Now the family of hafnium oxide-based materials has emerged as the leading candidate for high-k gate dielectrics due to their excellent physical properties. It is also realized that the high-k oxides must be implemented in conjunction with metal gate electrodes to get sufficient potential for CMOS continue scaling. In the advanced nanoscale Si-based CMOS devices, the composition and thickness of interfacial layers in the gate stacks determine the critical performance of devices. Therefore, detailed atomic- scale understandings of the microstructures and interfacial structures built in the advanced CMOS gate stacks, are highly required. In this paper, several high-resolution electron, ion, and photon-based techniques currently used to characterize the high-k gate dielectrics and interfaces at atomic-scale, are reviewed. Particularly, we critically review the research progress on the characterization of interface behavior and structural evolution in the high-k gate dielectrics by high-resolution transmission electron microscopy （HRTEM） and the related techniques based on scanning transmission electron microscopy （STEM）, including high-angle annular dark- field （HAADF） imaging （also known as Z-contrast imaging）, electron energy-loss spectroscopy （EELS）, and energy dispersive X-ray spectroscopy （EDS）, due to that HRTEM and STEM have become essential metrology tools for characterizing the dielectric gate stacks in the present and future generations of CMOS devices. In Section 1 of this review, the working principles of each technique are briefly introduced and their key features are outlined. In Section 2, microstructural characterizations of high-k gate dielectrics at atomic-scale by electron microscopy are critically reviewed by citing some recent results reported on high-k gate dielectrics. In Section 3, metal gate electrodes and the interfacial structures between high-k dielectrics and metal gates are discussed. The electron beam damage effects in high-k gate stacks are also evaluated, and their origins and prevention are described in Section 4. Finally, we end this review with personal perspectives towards the future challenges of atomic-scale material characterization in advanced CMOS gate stacks.

基于Leaky Noisy-or Gate和贝叶斯网络的光伏发电项目施工风险评估方法

针对复杂多变的光伏发电项目施工风险评估问题,利用Leaky Noisy-or Gate模型整合历史经验和专家知识来确定贝叶斯网络参数并建立光伏施工风险的贝叶斯网络模型,同时采用Netica仿真分析,对施工风险进行有效预测并诊断识别出关键性风险和敏感性风险,以便管理者精准施策、管控风险。为验证该方法的有效性,以Z项目为例进行建模仿真。结果表明,其施工风险等级为中等,与实际相符。

Current Progress of Hf(Zr)-Based High-k Gate Dielectric Thin Films

With the continued downscaling of complementary metal-oxide-semiconductor field effect transistor dimensions, high-dielectric constant （high-k） gate materials, as alternatives to SiO2, have been extensively investigated. Hf （Zr）-based high-k gate dielectric thin films have been regarded as the most promising candidates for high-k gate dielectric according to the International Technology Roadmap for Semiconductor due to their excellent physical properties and performance. This paper reviews the recent progress on Hf （Zr）-based high-k gate dielectrics based on PVD （physical vapor deposition） process. This article begins with a survey of various methods developed for generating Hf （Zr）-based high-k gate dielectrics, and then mainly focuses on microstructure, synthesis, characterization, formation mechanisms of interfacial layer, and optical properties of Hf （Zr）-based high-k gate dielectrics. Finally, this review concludes with personal perspectives towards future research on Hf （Zr）-based high-k gate dielectrics.

High performance trench MOS barrier Schottky diode with high-k gate oxide

A novel trench MOS barrier Schottky diode（TMBS） device with a high-k material introduced into the gate insulator is reported, which is named high-k TMBS. By simulation with Medici, it is found that the high-k TMBS can have 19.8% lower leakage current while maintaining the same breakdown voltage and forward turn-on voltage compared with the conventional regular trench TMBS.

Electronic mobility in the high-carrier-density limit of ion gel gated IDTBT thin film transistors

Indacenodithiophene-co-benzothiadiazole（IDTBT） has emerged as one of the most exciting semiconducting polymers in recent years because of its high electronic mobility and charge transport along the polymer backbone. By using the recently developed ion gel gating technique we studied the charge transport of IDTBT at carrier densities up to 10^21cm^-3.While the conductivity in IDTBT was found to be enhanced by nearly six orders of magnitude by ionic gating, the charge transport in IDTBT was found to remain 3D Mott variable range hopping even down to the lowest temperature of our measurements, 12 K. The maximum mobility was found to be around 0.2 cm^2·V^-1·s^-1, lower than that of Cytop gated field effect transistors reported previously. We attribute the lower mobility to the additional disorder induced by the ionic gating.

High-k gate dielectric GaAs MOS device with LaON as interlayer and NH_3-plasma surface pretreatment

High-k gate dielectric Hf Ti ON Ga As metal-oxide–semiconductor（MOS） capacitors with La ON as interfacial passivation layer（IPL） and NH3- or N2-plasma surface pretreatment are fabricated, and their interfacial and electrical properties are investigated and compared with their counterparts that have neither La ON IPL nor surface treatment. It is found that good interface quality and excellent electrical properties can be achieved for a NH3-plasma pretreated Ga As MOS device with a stacked gate dielectric of Hf Ti ON/La ON. These improvements should be ascribed to the fact that the NH3-plasma can provide H atoms and NH radicals that can effectively remove defective Ga/As oxides. In addition, La ON IPL can further block oxygen atoms from being in-diffused, and Ga and As atoms from being out-diffused from the substrate to the high-k dielectric. This greatly suppresses the formation of Ga/As native oxides and gives rise to an excellent high-k/Ga As interface.