Influence of interface crack on dynamic characteristics of CRTSⅢslab ballastless track on bridge

The damage of the self-compacting concrete in CRTSⅢslab ballastless track on bridge will lead to a partial void of the track slab,which will affect the comfort and safety of the train and the durability of the track slab and bridge structure.In order to study the impact of the interface crack on the dynamic response of CRTSⅢballastless track system on bridge,based on the principle of multi-body dynamics theory and ANSYS+SIMPACK co-simulation,the spatial model of vehicle-track-bridge integration considering the longitudinal stiffness of supports,the track structure and interlayer contact characteristics were established.The dynamic characteristics of the system under different conditions of the width,length and position of the interface crack were analysed,and the limited values of the length and width of the cracks at the track slab edge were proposed.The results show that when the self-compacting concrete does not completely void along the transverse direction of the track slab,the crack has little effect on the dynamic characteristics of the vehicle-track-bridge system.However,when the self-compacting concrete is completely hollowed out along the transverse direction of the track slab,the dynamic amplitudes of the system increase.When the crack length is 1.6 m,the wheel load reduction rate reaches 0.769,which exceeds the limit value and threatens the safety of train operation.The vertical acceleration of the track slab increases by 250.1%,which affects the service life of the track system under the train speed of 200 km/h.

The Richtmyer–Meshkov instability of a 'V' shaped air/helium interface subjected to a weak shock

The Richtmyer-Meshkov instability ofa ‘V＇ shaped air/helium gaseous interface subjected to a weak shock wave is experimentally studied. A soap film technique is adopted to create a ‘V＇ shaped interface with accurate initial conditions. Five kinds of ‘V＇ shaped interfaces with different vertex angles are formed to highlight the effects of initial conditions on the flow characteristics. The results show that a spike is generated after the shock impact, and grows constantly with time. As the vertex angle increases, vortices generated on the interface become less noticeable, and the spike develops less pronouncedly. The linear growth rate of interface width after compression phase is estimated by a linear model and a revised linear model, and the latter is proven to be more effective for the interface with high initial amplitudes. The linear growth rate of interface width is, for the first time in a heavy/light interface configuration, found to be a non-monotonous function of the initial perturbation amplitude-wavelength ratio.

Design of a Low-Power CMOS LVDS I/O Interface Circuit

The paper presents the design and implementation of LVDS （low-voltage differential signaling） receiver circuit, fully compatible with LVDS standard. The proposed circuit is composed of the telescopic amplifier and the comparator with internal hysteresis. The receiver supports 3.5 Gbps data rate with 7.4 mA current at 1.8 V supply according to post-layout circuit simulations. The circuit has the power consumption of 13.1 MW. Comparing with the conventional circuit, the circuit is achieved to reduce the power consumption by 19.1% and the data rate by 14.3 %. The validity and effectiveness of the proposed circuit are verified through the circuit simulation with Samsung 0.18 μm CMOS （complementary metal-oxide-semiconductor） standard technology under the 1.8 V supply voltage.

Design of IP core based on AMBA bus

With the rapid development of integrated circuit(IC)technology,reusable intelligent property(IP)core design is widely valued by the industry.Based on the in-depth study of the functional characteristics of advanced microcontroller bus architecture(AMBA),a design scheme of IP core is presented,and it is divided into the functional modules,and the structural design of the IP core is completed.The relationship between the internal modules of the IP core is clarified,and the top-down design method is used to build the internal architecture of the IP core.The IP core interface module,register module,baud rate module,transmit module,receive module,and interrupt module are designed in detail by using Verilog language.The simulation results show that the designed IP core supports serial peripheral interface(SPI)protocol,the function coverage of IP core reaches 100%,the maximum working frequency reaches 200 MHz,and the resource occupancy rate is less than 15%.The reusable IP core can support multiple data formats,multiple timing transmission modes,and master/slave operation modes,reducing the resource consumption of hardware circuits and having stronger applicability.

Design of shared bus DSP board in vector network analyzer

Currently,the mainstream vector network analyzer employs embedded computer module with a digital intermediate frequency(IF)board to form a high performance windows platform.Under this structure,the vector network analyzer needs a powerful encoding system to arbitrate the bus acquirement,which is usually realized by field-programmable gate array(FPGA)chip.The paper explores the shared bus design method of the digital signal processing(DSP)board in network analyzer.Firsty,it puts an emphasis on the system structure,and then the shared bus communication method is described in detail;Finally,the advantages of the shared bus communication mechanism are summanzed.

Ultra-high Speed and Dual-Channel Data Acquisition Card with IGSPS Based on PXI Bus

This paper discusses the chief techniques and design principles of an ultra-high speed and dual-channel data acquisition card based on PXI bus, using FPGA (Field Programmable Gate Array) as logic controller cell. The instmment consists of pre-pro- cess circuit, A/D converter, SDRAM (Synchronous Dynamic random access memory), and control circuit integrated in FPGA. It can achieve allowing up to 1000MHz real-time sampling rate. The test result indicates that the system works normally and the system design is successful.

Interfacial Oxides Evolution of High-Speed Steel Joints by Hot-Compression Bonding

The interfacial oxidation behavior of Cr_(4)Mo_(4) V high-speed steel(HSS)joints undergoing hot-compression bonding was investigated by using optical microscopy(OM),scanning electron microscopy(SEM),and transmission electron microscopy(TEM).In the heating and holding processes,dispersed rod-like and granularδ-Al_(2)O_(3) oxides were formed at the interface and in the matrix near the interface due to the selective oxidation and internal oxidation of Al,while irregular Si-Al-O compounds and spheroidal SiO_(2) particles were formed at the interface.After the post-holding treatment,SiO_(2) oxides and Si-Al-O compounds were dissolved into the matrix,andδ-Al_(2)O_(3) oxides were transformed into nanoscaleα-Al_(2)O_(3) particles,which did not deteriorate the mechanical properties of the joints.The formation and migration of newly-formed grain boundaries by plastic deformation and post-holding treatment were the main mechanism for interface healing.The tensile test results showed that the strength of the healed joints was comparable to that of the base material,and the in-situ tensile observations proved that the fracture was initiated at the grain boundary of the matrix rather than at the interface.The clarification of interfacial oxides and microstructure is essential for the application of hot-compression bonding of HSSs.

Chinese High-Speed Bus and Its Outlook

The emergence of expressway has exerted great influences on China’s auto industry. Rapid transit has put forward strict requirements for vehicle reliability, handle-stability and dynam-ics. The 9th Five-Year Plan for auto industry clearly states: Develop large & medium bus and deluxe touring bus suitable for long and medium distance running operation on expressway, en-

Design and implementation of high-speed real-time data acquisition system based on FPGA

The electromagnetic radiation will result in informa- tion leakage being recovered when computers work. This article presents a high-speed real-time data acquisition system based on peripheral component interconnect （PCI） bus and field programmable gate array （FPGA） for sampling electromagnetic radiation caused by video signal. The hardware design and controlling flow of each module are introduced in detail. The sampling rate can reach 64 Msps and system transfers speed can be up to 128 Mb/s by using time interleaving, which increases the overall sampling speed of a system by operating two data converters in parallel.

Mechanical characteristic variation of ballastless track in highspeed railway:effect of train–track interaction and environment loads

Due to the fact that ballastless tracks in highspeed railways are not only subjected to repeated train–track dynamic interaction loads,but also suffer from complex environmental loads,the fundamental understanding of mechanical performance of ballastless tracks under sophisticated service conditions is an increasingly demanding and challenging issue in high-speed railway networks.This work aims to reveal the effect of train–track interaction and environment loads on the mechanical characteristic variation of ballastless tracks in high-speed railways,particularly focusing on the typical interface damage evolution between track layers.To this end,a finite element model of a double-block ballastless track involving the cohesive zone model for the track interface is first established to analyze the mechanical properties of the track interface under the loading–unloading processes of the negative temperature gradient load(TGL)followed by the same cycle of the positive TGL.Subsequently,the effect of wheel–rail longitudinal interactions on the nonlinear dynamic characteristics of the track interface is investigated by using a vehicle-slab track vertical-longitudinal coupled dynamics model.Finally,the influence of dynamic water pressure induced by vehicle dynamic load on the mechanical characteristics and damage evolution of the track interface is elucidated using a fluid–solid coupling method.Results show that the loading history of the positive and negative TGLs has a great impact on the nonlinear development and distribution of the track interface stress and damage;the interface damage could be induced by the wheel–rail longitudinal vibrations at a high vehicle running speed owing to the dynamic amplification effect caused by short wave irregularities;the vehicle dynamic load could produce considerable water pressure that presents nonlinear spatial–temporal characteristics at the track interface,which would lead to the interface failure under a certain condition due to the coupled dynamic effect of vehicle load and water pressure.

Design of 4.25 Gbps Small Form-factor Pluggable(SFP) Transceiver

Compact, hot-pluggable, and data-agnostic, SFP modules bring up to 4.25 Gbps to a flexible new form factor. The SFP transceiver which is the core device of optical communication is always the research focus in the field of optical communication for both telecommunication and data communication applications. The working principles of SFP including the transmitter components, the receiver components and the microcontroller are discussed in detail. The basic theory of high-speed signal and the concept of high - speed circuit, high-speed board design techniques are presented. A new design of high performance, cost effective SFP transceiver and PCB layout are also presented. The performance of the transceiver is analyzed and the characteristics of the sample are coincident with the expected ones. The status of the transceiver can be monitored and controlled by F C bus through the interface in real time. This transceiver can meet the requirement of SFF-8472.

A NOVEL PHYSICAL-LAYER TRANSCEIVER USED IN USB2.0 SERIAL DATA LINK

The paper proposes a novel transceiver in physical layer for high-speed serial data link based upon Universal Serial Bus (USB) 2.0, comprising transmitter and receiver. In the design, transmitter contains pre-and-main driver to satisfy slew rate of output data, receiver includes optimized topology to improve preci- sion of received data. The circuit simulation is based on Cadence’s spectre software and Taiwan Semiconduc- tor Manufacture Corporation’s library of 0.25μm mixed-signal Complementary Metal-Oxide Semiconductor (CMOS) model. The front and post-simulation results reveal that the transceiver designed can transmit and re- ceive high-speed data in 480Mbps, which is in agreement with USB2.0 specification. The chip of physi- cal-layer transceiver has been designed and implemented with 0.25μm standard CMOS technology.

The Design of Observatory Control System of LAMOST

This paper describes the system modelling, architecture design and implementation of the observatory control system （OCS） of the LAMOST （Large Area Multi-Object Fibre Spectroscopic Telescope）. The software-reuse technique, object-oriented technique, component and framework based software-developing methodology are used in the system architecture and implementation. The architecture of OCS is established based on a component-based layered system using many patterns such as the MVC （Model/View/Controller） and proxy. For the effective and safe exchange of commands and status between OCS and the subsystem, a unified message bus is defined and three protocols, namely a command acceptance/rejection protocol, a command execution feedback protocol and a status handling protocol, are proposed. The interface protocol between all the subsystems is defined. The full utilization of advanced computer technologies including the database, distributed computing, real-time computing, standard data exchange and expert system technologies has benefited the OCS software development.

Computational Analysis of the Metal Free-Surface Instability, Fragmentation, and Ejecta under Shock

We conducted numerical simulations of the related processes of interface instability, tensile fragmentation, and jetting resulting from four kinds of typical macro defect perturbations (chevron, sine wave, rectangle, and square) on a Cu free surface under a reflected shock wave when Cu impacts a solid wall at a speed of 2.5 km/s and found that, for the chevron and sine wave cases, the ejecta velocities of the head are 6.28 and 5.88 km/s, respectively. Some parts of the inner material are in a tensile state without any fragmentation, which is observed only in the main body of the material owing to the tension effect. Furthermore, for the other two initial perturbations (rectangle and square), the highest ejecta velocities may even reach 9.14 and 9.59 km/s, respectively. Fragmentation caused by multilayer spallation can be observed on a large scale in the Cu main body, and there are granules in the front area of the ejecta but the degree to which fragmentation occurs is much less in the Cu main body and there is a notable high-speed, low-density granule area in the ejecta head. Finally, we present a detailed analysis of the spatial distribution of the granules, ejecta mass, pressure, temperature, and grid convergence.

Microstructures and mechanical properties of Cu/Al compound materials during thermal cycle

Cu/Al compound materials,named as copperclad aluminum bus bars,are widely used in heat dissipation of modern engineering.The thermal cycle tests were conducted at 200,250 and 300℃for different cycle times,respectively.Effects of thermal cycle temperatures and thermal cycle times on micro structures and mechanical properties of the interface were studied.The results show that the width of bonding layer and bond strength are significantly affected by thermal cycle temperatures and times.Nonetheless,the variety or the quantity of intermediate compounds is scarcely influenced.Al_(2)Cu,Cu_(9) Al_(4)and CuAl were identified on the interface.With the increase in cycle times,grains of the material grew up.However,grains of the interface grew up more apparently than those of Cu and Al.The knowledge may be applied in the establishment of service condition and quality evaluation of material.

Towards a standardisation for digital inputs and outputs of protection functions in IEC 60255 series

Fully digitalized substations using IEC 61850 process bus are being introduced all over the world.Numerous utilities have featured pilot projects,demonstrators or even industrial scale deployment of these Fully Digital Protection,Auto-mation and Control Systems(FD-PACS).Product standards such as profiles for Instrument Transformers have been developed and published(IEC 61869-6 and IEC 61869-9 by TC 38-Instrument Transformers).This raises the question about the standards for digitally interfaced protection functions.In 2016,IEC TC 95(Measuring relays and protection equipment)charged a working group to investigate this subject and to elaborate recommendations concerning requirements and testing of protection IED with digital inputs and outputs for protection standards(IEC 60255-1xx series).For protection functions,publisher/subscriber based data streams are supposed to comply with IEC 61850 and IEC 61869 standards.This holds in particular for Sampled Values(SV)representing energising inputs of the protection function,and is also applicable to Generic Object Oriented Substation Event(GOOSE)which can be used for input or output of protection functions.Quality attributes of published data depend on the operational and connection status of the function and the hosting IED.In addition,protection functions have to take into account the information regarding the time synchronisation of the received SV and other parameters.This paper gives an overview of these features and the proposed way to take them into account in the IEC 60255 standard series.It describes the progress of WG 2 and relates it to existing standardization documents.