The ADC12 aluminum alloy is prone to severe tool wear and high cutting heat during high-speed milling because of its high hardness.This study analyzes the highspeed milling process from the perspective of different ch...The ADC12 aluminum alloy is prone to severe tool wear and high cutting heat during high-speed milling because of its high hardness.This study analyzes the highspeed milling process from the perspective of different chip morphologies.The influence of cutting temperature on chip morphology was expounded.A two-dimensional orthogonal cutting model was established for finite element analysis(FEA)of high-speed milling of ADC12 aluminum alloy.A theoretical analysis model of cutting force and cutting temperature was proposed based on metal cutting theory.The variations in chip shape,cutting force,and cutting temperature with cutting speed increasing were analyzed via FEA.The results show that,with the increase in cutting speed,the chip morphology changes from continuous to serrated,and then back to continuous.The serrated chip is weakened and the cutting temperature is lowered when the speed is lower than 600 m·min^(-1)or higher than 1800 m·min^(-1).This study provides a reference for reducing cutting temperature,controlling chip morphology and improving cutting tool life.展开更多
The electromagnetic radiation will result in informa- tion leakage being recovered when computers work. This article presents a high-speed real-time data acquisition system based on peripheral component interconnect ...The electromagnetic radiation will result in informa- tion leakage being recovered when computers work. This article presents a high-speed real-time data acquisition system based on peripheral component interconnect （PCI） bus and field programmable gate array （FPGA） for sampling electromagnetic radiation caused by video signal. The hardware design and controlling flow of each module are introduced in detail. The sampling rate can reach 64 Msps and system transfers speed can be up to 128 Mb/s by using time interleaving, which increases the overall sampling speed of a system by operating two data converters in parallel.展开更多
A bunch arrival-time monitor(BAM) system,based on electro-optical intensity modulation scheme, is under study at Shanghai Soft X-ray Free Electron Laser.The aim of the study is to achieve high-precision time measureme...A bunch arrival-time monitor(BAM) system,based on electro-optical intensity modulation scheme, is under study at Shanghai Soft X-ray Free Electron Laser.The aim of the study is to achieve high-precision time measurement for minimizing bunch fluctuations. A readout electronics is developed to fulfill the requirements of the BAM system. The readout electronics is mainly composed of a signal conditioning circuit, field-programmable gate array(FPGA), mezzanine card(FMC150), and powerful FPGA carrier board. The signal conditioning circuit converts the laser pulses into electrical pulse signals using a photodiode. Thereafter, it performs splitting and low-noise amplification to achieve the best voltage sampling performance of the dual-channel analog-to-digital converter(ADC) in FMC150. The FMC150 ADC daughter card includes a 14-bit 250 Msps dual-channel high-speed ADC,a clock configuration, and a management module. The powerful FPGA carrier board is a commercial high-performance Xilinx Kintex-7 FPGA evaluation board. To achieve clock and data alignment for ADC data capture at a high sampling rate, we used ISERDES, IDELAY, and dedicated carry-in resources in the Kintex-7 FPGA. This paper presents a detailed development of the readout electronics in the BAM system and its performance.展开更多
A dedicated 4πβ（LS）-γ（HPGe） digital coincidence system with five acquisition channels has been developed. Three ADC acquisition channels with an acquisition resolution of 8 bits and acquisition rate of 1 GSPS a...A dedicated 4πβ（LS）-γ（HPGe） digital coincidence system with five acquisition channels has been developed. Three ADC acquisition channels with an acquisition resolution of 8 bits and acquisition rate of 1 GSPS are utilized to collect the signals from three PMTs which are used to detect β decay, and two acquisition channels with an acquisition resolution of 16 bits and acquisition rate of 50 MSPS are utilized to collect the signals from high-purity germanium（HPGe）, which is used to detect γ decay. In order to increase the accuracy of the coincidence system, all five acquisition channels are synchronous within 500 ps. The data collected by the five acquisition channels will be transmitted to the host PC through a PCI bus and saved as a file. Off-line software is utilized for the 4πβ（LS）-γ（HPGe） coincidence and data analysis as needed in practical applications. Tests of the system show that system can record pulse signals from 4πβ（LS）-γ（HPGe） synchronously for further coincidence calculation and the highest coincidence rate of the system is 20 K/s, which is sufficient for most applications. Compared with traditional coincidence modules like MAC3, the digital coincidence system has a higher flexibility of coincidence algorithm. In addition, due to the use of ADC, the structure of the coincidence system is simplified. This paper introduces the design of the hardware, the synchronization method and the test results of this system.展开更多
ATLAS LAr calorimeter will undergo its Phase-I upgrade during the long shutdown（LS2） in 2018, and a new LAr Trigger Digitizer Board（LTDB） will be designed and installed. Several commercial-off-the-shelf（COTS）mul...ATLAS LAr calorimeter will undergo its Phase-I upgrade during the long shutdown（LS2） in 2018, and a new LAr Trigger Digitizer Board（LTDB） will be designed and installed. Several commercial-off-the-shelf（COTS）multi-channel high-speed ADCs have been selected as possible backups of the radiation tolerant ADC ASICs for the LTDB. To evaluate the radiation tolerance of these backup commercial ADCs, we developed an ADC radiation tolerance characterization system, which includes the ADC boards, data acquisition（DAQ） board, signal generator,external power supplies and a host computer. The ADC board is custom designed for different ADCs, with ADC drivers and clock distribution circuits integrated on board. The Xilinx ZC706 FPGA development board is used as a DAQ board. The data from the ADC are routed to the FPGA through the FMC（FPGA Mezzanine Card）connector, de-serialized and monitored by the FPGA, and then transmitted to the host computer through the Gigabit Ethernet. A software program has been developed with Python, and all the commands are sent to the DAQ board through Gigabit Ethernet by this program. Two ADC boards have been designed for the ADC, ADS52J90 from Texas Instruments and AD9249 from Analog Devices respectively. TID tests for both ADCs have been performed at BNL, and an SEE test for the ADS52J90 has been performed at Massachusetts General Hospital（MGH）. Test results have been analyzed and presented. The test results demonstrate that this test system is very versatile, and works well for the radiation tolerance characterization of commercial multi-channel high-speed ADCs for the upgrade of the ATLAS LAr calorimeter. It is applicable to other collider physics experiments where radiation tolerance is required as well.展开更多
基金the National Natural Science Foundation of China(No.51975123)Fuzhou Science and Technology Plan Project(No.2019G42)。
文摘The ADC12 aluminum alloy is prone to severe tool wear and high cutting heat during high-speed milling because of its high hardness.This study analyzes the highspeed milling process from the perspective of different chip morphologies.The influence of cutting temperature on chip morphology was expounded.A two-dimensional orthogonal cutting model was established for finite element analysis(FEA)of high-speed milling of ADC12 aluminum alloy.A theoretical analysis model of cutting force and cutting temperature was proposed based on metal cutting theory.The variations in chip shape,cutting force,and cutting temperature with cutting speed increasing were analyzed via FEA.The results show that,with the increase in cutting speed,the chip morphology changes from continuous to serrated,and then back to continuous.The serrated chip is weakened and the cutting temperature is lowered when the speed is lower than 600 m·min^(-1)or higher than 1800 m·min^(-1).This study provides a reference for reducing cutting temperature,controlling chip morphology and improving cutting tool life.
基金the National Natural Science Foundation of China （60331010, 60271018）.
文摘The electromagnetic radiation will result in informa- tion leakage being recovered when computers work. This article presents a high-speed real-time data acquisition system based on peripheral component interconnect （PCI） bus and field programmable gate array （FPGA） for sampling electromagnetic radiation caused by video signal. The hardware design and controlling flow of each module are introduced in detail. The sampling rate can reach 64 Msps and system transfers speed can be up to 128 Mb/s by using time interleaving, which increases the overall sampling speed of a system by operating two data converters in parallel.
基金supported by the National Key R&D Plan(No.2016YFA0401900)
文摘A bunch arrival-time monitor(BAM) system,based on electro-optical intensity modulation scheme, is under study at Shanghai Soft X-ray Free Electron Laser.The aim of the study is to achieve high-precision time measurement for minimizing bunch fluctuations. A readout electronics is developed to fulfill the requirements of the BAM system. The readout electronics is mainly composed of a signal conditioning circuit, field-programmable gate array(FPGA), mezzanine card(FMC150), and powerful FPGA carrier board. The signal conditioning circuit converts the laser pulses into electrical pulse signals using a photodiode. Thereafter, it performs splitting and low-noise amplification to achieve the best voltage sampling performance of the dual-channel analog-to-digital converter(ADC) in FMC150. The FMC150 ADC daughter card includes a 14-bit 250 Msps dual-channel high-speed ADC,a clock configuration, and a management module. The powerful FPGA carrier board is a commercial high-performance Xilinx Kintex-7 FPGA evaluation board. To achieve clock and data alignment for ADC data capture at a high sampling rate, we used ISERDES, IDELAY, and dedicated carry-in resources in the Kintex-7 FPGA. This paper presents a detailed development of the readout electronics in the BAM system and its performance.
基金Supported by National Metrology Institute of China
文摘A dedicated 4πβ（LS）-γ（HPGe） digital coincidence system with five acquisition channels has been developed. Three ADC acquisition channels with an acquisition resolution of 8 bits and acquisition rate of 1 GSPS are utilized to collect the signals from three PMTs which are used to detect β decay, and two acquisition channels with an acquisition resolution of 16 bits and acquisition rate of 50 MSPS are utilized to collect the signals from high-purity germanium（HPGe）, which is used to detect γ decay. In order to increase the accuracy of the coincidence system, all five acquisition channels are synchronous within 500 ps. The data collected by the five acquisition channels will be transmitted to the host PC through a PCI bus and saved as a file. Off-line software is utilized for the 4πβ（LS）-γ（HPGe） coincidence and data analysis as needed in practical applications. Tests of the system show that system can record pulse signals from 4πβ（LS）-γ（HPGe） synchronously for further coincidence calculation and the highest coincidence rate of the system is 20 K/s, which is sufficient for most applications. Compared with traditional coincidence modules like MAC3, the digital coincidence system has a higher flexibility of coincidence algorithm. In addition, due to the use of ADC, the structure of the coincidence system is simplified. This paper introduces the design of the hardware, the synchronization method and the test results of this system.
基金Supported by the U.S.Department of Energy(DE-SC001270)
文摘ATLAS LAr calorimeter will undergo its Phase-I upgrade during the long shutdown（LS2） in 2018, and a new LAr Trigger Digitizer Board（LTDB） will be designed and installed. Several commercial-off-the-shelf（COTS）multi-channel high-speed ADCs have been selected as possible backups of the radiation tolerant ADC ASICs for the LTDB. To evaluate the radiation tolerance of these backup commercial ADCs, we developed an ADC radiation tolerance characterization system, which includes the ADC boards, data acquisition（DAQ） board, signal generator,external power supplies and a host computer. The ADC board is custom designed for different ADCs, with ADC drivers and clock distribution circuits integrated on board. The Xilinx ZC706 FPGA development board is used as a DAQ board. The data from the ADC are routed to the FPGA through the FMC（FPGA Mezzanine Card）connector, de-serialized and monitored by the FPGA, and then transmitted to the host computer through the Gigabit Ethernet. A software program has been developed with Python, and all the commands are sent to the DAQ board through Gigabit Ethernet by this program. Two ADC boards have been designed for the ADC, ADS52J90 from Texas Instruments and AD9249 from Analog Devices respectively. TID tests for both ADCs have been performed at BNL, and an SEE test for the ADS52J90 has been performed at Massachusetts General Hospital（MGH）. Test results have been analyzed and presented. The test results demonstrate that this test system is very versatile, and works well for the radiation tolerance characterization of commercial multi-channel high-speed ADCs for the upgrade of the ATLAS LAr calorimeter. It is applicable to other collider physics experiments where radiation tolerance is required as well.
