High-SpeedReal-TimeDataAcquisitionSystem Realized by Interleaving/Multiplexing Technique

The interleaving/multiplexing technique was used to realize a 200?MHz real time data acquisition system. Two 100?MHz ADC modules worked parallelly and every ADC plays out data in ping pang fashion. The design improved the system conversion rata to 200?MHz and reduced the speed of data transporting and storing to 50?MHz. The high speed HDPLD and ECL logic parts were used to control system timing and the memory address. The multi layer print board and the shield were used to decrease interference produced by the high speed circuit. The system timing was designed carefully. The interleaving/multiplexing technique could improve the system conversion rata greatly while reducing the speed of external digital interfaces greatly. The design resolved the difficulties in high speed system effectively. The experiment proved the data acquisition system is stable and accurate.

High-speed broadband data acquisition system based on FPGA

A field-programmable gate array(FPGA)based high-speed broadband data acquisition system is designed.The system has a dual channel simultaneous acquisition function.The maximum sampling rate is 500 MSa/s and bandwidth is200 MHz,which solves the large bandwidth,high-speed signal acquisition and processing problems.At present,the data acquisition system is successfully used in broadband receiver test systems.

If real-time route and high-speed data is important,GoTa is vital.

GoTaTM from ZTE is the world’s first CDMA-based system. Now, ZTE proudly introduces its third-generation digital trunking system featuring a centralized dispatch,

If real-time route and high-speed data is important, GoTa is vital.

GoTa TM from ZTE is the world’s first CDMA-based system. Now, ZTE proudly introduces its third-generation digital trunking system featuring

If real-time route and high-speed data is important, GoTa is vital.

Go Tafrom ZTE is the world’s first CDMA-based system. Now, ZTE proudly introduces its third-generation digital trunking system featuring a centralized dispatch,

A power-quality monitoring and assessment system for high-speed railways based on train-network-data center integration

In recent years,with the rapid development of high-speed railways(HSRs),power interruptions or disturbances in traction power supply systems have become increasingly dangerous.However,it is often impossible to detect these faults immediately through single-point monitoring or collecting data after accidents.To coordinate the power quality data of both traction power supply systems(TPSSs)and high-speed trains(HSTs),a monitoring and assessing system is proposed to access the power quality issues on HSRs.By integrating train monitoring,traction substation monitoring and data center,this monitoring system not only realizes the real-time monitoring of operational behaviors for both TPSSs and HSTs,but also conducts a comprehensive assessment of operational quality for train-network systems.Based on a large number of monitoring data,the field measurements show that this real-time monitoring system is effective for monitoring and evaluating a traction-network system.

A Modified Generative Adversarial Network for Fault Diagnosis in High-Speed Train Components with Imbalanced and Heterogeneous Monitoring Data

Data-driven methods are widely considered for fault diagnosis in complex systems.However,in practice,the between-class imbalance due to limited faulty samples may deteriorate their classification performance.To address this issue,synthetic minority methods for enhancing data have been proved to be effective in many applications.Generative adversarial networks(GANs),capable of automatic features extraction,can also be adopted for augmenting the faulty samples.However,the monitoring data of a complex system may include not only continuous signals but also discrete/categorical signals.Since the current GAN methods still have some challenges in handling such heterogeneous monitoring data,a Mixed Dual Discriminator GAN(noted as M-D2GAN)is proposed in this work.In order to render the expanded fault samples more aligned with the real situation and improve the accuracy and robustness of the fault diagnosis model,different types of variables are generated in different ways,including floating-point,integer,categorical,and hierarchical.For effectively considering the class imbalance problem,proper modifications are made to the GAN model,where a normal class discriminator is added.A practical case study concerning the braking system of a high-speed train is carried out to verify the effectiveness of the proposed framework.Compared to the classic GAN,the proposed framework achieves better results with respect to F-measure and G-mean metrics.

Design of high-speed signal acquisition system and analysis of signal integrity

The device is used for the test on the fuze detonating time according to the initial velocity of the projectile and the altitude and speed of enemy aircraft flight. For the special requirements of the high-speed signal acquisition in the process, the characteristics of the measured signal are analyzed. The system is investigated in chip selection, signal transmission, signal processing, signal storage, post-production PCB design, etc. The appropriate measures and solutions which affect the integrity and accuracy of the signal in each process are proposed. The rules for the layout of the device and wiring are made. The result show that the measurement values are accurate without loss of data.

An Optimal Feed Interpolator Based on G^2 Continuous Bézier Curves for High-Speed Machining of Linear Tool Path

A numerical control (NC) tool path of digital CAD model is widely generated as a set of short line segments in machining. However, there are three shortcomings in the linear tool path, such as discontinuities of tangency and curvature, huge number of line segments, and short lengths of line segments. These disadvantages hinder the development of high speed machining. To smooth the linear tool path and improve machining efficiency of short line segments, this paper presents an optimal feed interpolator based on G^2 continuous Bézier curves for the linear tool path. First, the areas suitable for fitting are screened out based on the geometric characteristics of continuous short segments (CSSs). CSSs in every area are compressed and fitted into a G^2 Continuous Bézier curve by using the least square method. Then a series of cubic Bézier curves are generated. However, the junction between adjacent Bézier curves is only G^0 continuous. By adjusting the control points and inserting Bézier transition curves between adjacent Bézier curves, the G^2 continuous tool path is constructed. The fitting error is estimated by the second-order Taylor formula. Without iteration, the fitting algorithm can be implemented in real-time environment. Second, the optimal feed interpolator considering the comprehensive constraints (such as the chord error constraint, the maximum normal acceleration, servo capacity of each axis, etc.) is proposed. Simulation and experiment are conducted. The results shows that the proposed method can generate smooth path, decrease the amount of segments and reduce machining time for machining of linear tool path. The proposed research provides an effective method for high-speed machining of complex 2-D/3-D profiles described by short line segments.

HOTCAP:a new software package for high-speed oscilloscopebased three-dimensional bunch charge and position measurement

A software package to be used in high-speed oscilloscope-basedthree-dimensionalbunch-by-bunch charge and position measurement is presented.The software package takes the pick-up electrode signal waveform recorded by the high-speed oscilloscope as input,and it calculates and outputs the bunch-by-bunch charge and position.In addition to enabling a three-dimensional observation of the motion of each passing bunch on all beam position monitor pick-up electrodes,it offers many additional features such as injection analysis,bunch response function reconstruction,and turn-by-turn beam analysis.The software package has an easy-to-understand graphical user interface and convenient interactive operation,which has been verified on the Windows 10 system.

Statistical delay distribution analysis on high-speed railway trains

The focus of this study is to explore the statis-tical distribution models of high-speed railway (HSR) train delays. Based on actual HSR operational data, the delay causes and their classification, delay frequency, number of affected trains, and space–time delay distributions are discussed. Eleven types of delay events are classified, and a detailed analysis of delay distribution for each classifica-tion is presented. Models of delay probability delay prob-ability distribution for each cause are proposed. Different distribution functions, including the lognormal, exponen-tial, gamma, uniform, logistic, and normal distribution, were selected to estimate and model delay patterns. The most appropriate distribution, which can approximate the delay duration corresponding to each cause, is derived. Subsequently, the Kolmogorov–Smirnov (K–S) test was used to test the goodness of fit of different train delay distribution models and the associated parameter values. The test results show that the distribution of the test data is consistent with that of the selected models. The fitting distribution models show the execution effect of the timetable and help in finding out the potential conflicts in real-time train operations.

A fault prediction method for catenary of high-speed rails based on meteorological conditions

Fault frequency of catenary is related to meteo-rological conditions. In this work, based on the historical data, catenary fault frequency and weather-related fault rate are introduced to analyse the correlation between catenary faults and meteorological conditions, and further the effect of meteorological conditions on catenary oper-ation. Moreover, machine learning is used for catenary fault prediction. As with the single decision tree, only a small number of training samples can be classified cor-rectly by each weak classifier, the AdaBoost algorithm is adopted to adjust the weights of misclassified samples and weak classifiers, and train multiple weak classifiers. Finally, the weak classifiers are combined to construct a strong classifier, with which the final prediction result is obtained. In order to validate the prediction method, an example is provided based on the historical data from a railway bureau of China. The result shows that the mapping relation between meteorological conditions and catenary faults can be established accurately by AdaBoost algorithm. The AdaBoost algorithm can accurately predict a catenary fault if the meteorological conditions are provided.

Design and implementation of 1 GHz high speed data acquisition system

With the development of current electronic technology, numerous high-speed data acquisition systems provide a variety of potential benefits. This article describes a high-speed data acquisition system which consists of ECL logic and TTL logic devices, samples and stores data with a 1 GHz clock. This system is accomplished easily and works stably. A performance test of this system has been undertaken and the results show that the effective number of bits （ENOB） is more than 6.5 bits.

Silicon photonic transceivers for application in data centers

Global data traffic is growing rapidly,and the demand for optoelectronic transceivers applied in data centers(DCs)is also increasing correspondingly.In this review,we first briefly introduce the development of optoelectronics transceivers in DCs,as well as the advantages of silicon photonic chips fabricated by complementary metal oxide semiconductor process.We also summarize the research on the main components in silicon photonic transceivers.In particular,quantum dot lasers have shown great potential as light sources for silicon photonic integration—whether to adopt bonding method or monolithic integration—thanks to their unique advantages over the conventional quantum-well counterparts.Some of the solutions for highspeed optical interconnection in DCs are then discussed.Among them,wavelength division multiplexing and four-level pulseamplitude modulation have been widely studied and applied.At present,the application of coherent optical communication technology has moved from the backbone network,to the metro network,and then to DCs.

Product Data Model for Performance-driven Design

When designing large-sized complex machinery products, the design focus is always on the overall per- formance; however, there exist no design theory and method based on performance driven. In view of the defi- ciency of the existing design theory, according to the performance features of complex mechanical products, the performance indices are introduced into the traditional design theory of ＂Requirement-Function-Structure＂ to construct a new five-domain design theory of ＂Client Requirement-Function-Performance-Structure-Design Parameter＂. To support design practice based on this new theory, a product data model is established by using per- formance indices and the mapping relationship between them and the other four domains. When the product data model is applied to high-speed train design and combining the existing research result and relevant standards, the corresponding data model and its structure involving five domains of high-speed trains are established, which can provide technical support for studying the relationships between typical performance indices and design parame- ters and the fast achievement of a high-speed train scheme design. The five domains provide a reference for the design specification and evaluation criteria of high speed train and a new idea for the train＇s parameter design.

Ultra-high Speed and Dual-Channel Data Acquisition Card with IGSPS Based on PXI Bus

This paper discusses the chief techniques and design principles of an ultra-high speed and dual-channel data acquisition card based on PXI bus, using FPGA (Field Programmable Gate Array) as logic controller cell. The instmment consists of pre-pro- cess circuit, A/D converter, SDRAM (Synchronous Dynamic random access memory), and control circuit integrated in FPGA. It can achieve allowing up to 1000MHz real-time sampling rate. The test result indicates that the system works normally and the system design is successful.

Design and implementation of high-speed real-time data acquisition system based on FPGA

The electromagnetic radiation will result in informa- tion leakage being recovered when computers work. This article presents a high-speed real-time data acquisition system based on peripheral component interconnect （PCI） bus and field programmable gate array （FPGA） for sampling electromagnetic radiation caused by video signal. The hardware design and controlling flow of each module are introduced in detail. The sampling rate can reach 64 Msps and system transfers speed can be up to 128 Mb/s by using time interleaving, which increases the overall sampling speed of a system by operating two data converters in parallel.

Broadband Communications for High-Speed Trains via NDN Wireless Mesh Network

With the increasing utilization of High-Speed Trains （HSTs）, the need for a reliable and high-bandwidth Internet access under high-speed mobility scenarios has become more demanding. In static, walking, and low mobility environments, TCP/IP （transmission control protocol/Internet protocol） can work well. However, TCP/IP cannot work well in high-speed scenarios because of reliability and handoff delay problems. This is mainly because the mobile node is required to maintain the connection to the corresponding node when it handovers to another access point node. In this paper, we propose a named data networking wireless mesh network architecture for HST wireless communication （NDN-Mesh-T）, which combines the advantages of Wireless Mesh Networks （WMNs） and NDN architectures. We attempt to solve the reliability and handoff delay problems to enable high bandwidth and low latency in Internet access in HST scenarios. To further improve reliability and bandwidth utilization, we propose a Direction-Aware Forwarding （DAF） strategy to forward Interest packet along the direction of the running train. The simulation results show that the proposed scheme can significantly reduce the packet loss rate by up to 51% compared to TCP/IP network architecture. Moreover, the proposed mechanism can reduce the network load, handoff delay, and data redundancy.

Performance Analysis for EDMA Based on TIC6678Multi-core DSP

Frequent data exchange among all kinds of memories has become an inevitable phenomenon in the process of modern embeddedsoftware design. In order to improve the ability of the embedded system data＇s throughput and computation, most embeddeddevices introduce Enhanced Direct Memory Access （EDMA） data transfer technology. TMS320C6678 is a multi-core DSPproduced by Texas Instruments （TI）. There are ten EDMA transmission controllers in the chip for configuration and datatransmissions are allowed to be performed between any two pieces of storage at the same time. This paper expounds the workingmechanism of EDMA based on multi-core DSP TMS320C6678. At the same time, multiple data sets are provided and thebottleneck of limiting data throughout is analyzed and solved.

Research and Development on an Embedded Digital Storage Oscillo-scope Based on PXA 270

This paper discusses the chief techniques and design principles of an embedded digital storage oscilloscope based on PXA 270, using FPGA as logic controller cell. The data acquisition partition consists of pre-process circuit, A/D converter, on-board memories, and control circuit integrated in FPGA. In the PB and EVC development environment, developers realized the part of em-bedded software. Actual test showed that the highest real-time sampling rate of the oscilloscope is up to lGHz/s, which has achieved the desired design requirements.