Study on wear characteristics and authorized limits of switch rails of high-speed turnout

Purpose-It is quite universal for high-speed turnouts to be exposed to the wear of the stock rail of the switch rail during the service process.The wear will cause the change of railhead profile and the relative positions of the switch rail and the stock rail,which will directly affect the wheel-rail contact state and wheel load transition when a train passes the turnout and will further impose serious impacts on the safety and stability of train operation.The purpose of this paper is to provide suggestions for wear management of high-speed turnout.Design/methodology/approach-The actual wear characteristics of switch rails of high-speed turnouts in different guiding directions were studied based on the monitoring results on site;the authorized wear limits for the switch rails of high-speed turnout were studied through derailment risk analysis and switch rail strength analysis.Findings-The results show that:the major factor for the service life of a curved switch rail is the lateral wear.The wear characteristics of the curved switch rail of a facing turnout are significantly different from those of a trailing turnout.To be specific,the lateral wear of the curved switch rail mainly occurs in the narrower section at its front end for a trailing turnout,but in the wider section at its rear end when for a facing turnout.The maximum lateral wear of a dismounted switch rail from a trailing turnout is found on the 15-mm wide section and is 3.9 mm,which does not reach the specified limit of 6 mm.For comparison,the lateral wear of a dismounted switch rail from a facing turnout is found from the 35-mm wide section to the full-width section and is greater than 7.5 mm,which exceeds the specified limit.Based on this,in addition to meeting the requirements of maintenance rules,the allowed wear of switch rails of high-speed turnout shall be so that the dangerous area with a tangent angle of wheel profile smaller than 43.68 will not contact the switch rail when the wheel is lifted by 2 mm.Accordingly,the lateral wear limit at the 5-mm wide section of the curved switch rail shall be reduced from 6 mm(as specified)to 3.5 mm.Originality/value-The work in this paper is of reference significance to the research on the development law of rail wear in high-speed turnout area and the formulation of relevant standards.

Design and Implementation of Dynamic High-Speed Switches in Super Base Station Architectures

Novel centralized base station architectures integrating computation and communication functionalities have become important for the development of future mobile communication networks.Therefore,the development of dynamic high-speed interconnections between baseband units(BBUs)and remote radio heads(RRHs)is vital in centralized base station design.Herein,dynamic high-speed switches(HSSs)connecting BBUs and RRHs were designed for a centralized base station architecture.We analyzed the characteristics of actual traffic and introduced a switch traffic model suitable for the super base station architecture.Then,we proposed a data-priority-aware(DPA)scheduling algorithm based on the traffic model.Lastly,we developed the dynamic HSS model based on the OPNET platform and the prototype based on FPGA.Our results show that the DPA achieves close to 100%throughput with lower latency and provides better run-time complexity than iOCF and HE-iSLIP,thereby demonstrating that the proposed switch system can be adopted in centralized base station architectures.

An Interconnected Multi-Plane Multi-Stage Fault-Tolerant On-Board Switching Fabric

The harsh space radiation environment compromises the reliability of an on-board switching fabric by leading to cross-point and switching element(SE)faults.Different from traditional faulttolerant switching fabrics only taking crosspoint faults into account,a novel Input and Output Parallel Clos network,referred to as the(p_1,p_2)-IOPClos,is proposed to tolerate both cross-point and SE faults.In the(p_1,p_2)-IOPClos,there are p_1 and p_2 expanded parallel switching planes in the input and output stages,respectively.The multiple input/output switching planes are interconnected through the middle stage to provide multiple paths in each stage by which the network throughput can be increased remarkably.Furthermore,the network reliability of the(p_1,p_2)-IOPClos under the above both kinds of faults is analyzed.The corresponding implementation cost is also presented along with the network size.Both theoretical analysis and numerical results indicate that the(p_1,p_2)-IOPClos outperforms traditional Clos-type networks at reliability,while has less implementation cost than the multi-plane Clos network.

PERFORMANCE ANALYSIS OF AN INPUT-BUFFERED ATM SWITCHING FABRIC WITH INDEPENDENT WINDOW-ACCESS SCHEME

In this paper, an Independent Window-Access(IWA) scheme is proposed, and the performance of an input-buffered ATM switching fabric with the IWA scheme is analysed by means of a probability generating function approach, the closed formulas of the average cell delay and the maximum throughput are given, and results show that the IWA scheme makes the switching fabric have better performances than traditional window-access scheme. The computer simulation results are in good agreement with these analytical results.

A CENTRAL-STAGE BUFFERED THREE-STAGE CLOS SWITCHING FABRIC AND THE SCHEDULING ALGORITHM

Current MSM switching fabric has poor performance under unbalanced traffic. This paper presents an alternative, novel Central-stage Buffered Three-stage Clos switching (CB-3Clos) fabric and proves that this fabric can emulate output queuing switch without any speedup. By analyzing the condition to satisfy the central-stage load-balance, this paper also proposes a Central-stage Load-balanced-based Distributed Scheduling algorithm (CLDS) for CB-3Clos. The results show that, compared with Concurrent Round-Robin based Dispatching (CRRD) algorithm based on MSM, CLDS algorithm has high throughput irrespective with the traffic model and better performance in mean packet delay.

A PARALLEL SWITCH FABRIC BASED ON CROSSBAR

With the increase of link rate, the arbitrator of centralized switch fabric becomes too complicated to implement. A parallel switch fabric based on crossbar, named as PSFBC (Parallel Switch Fabric Based on Crossbar), has been proposed in this paper. PSFBC is composed of k switches whose rate is 1/k of link’, these switches exchange cells in parallel; this increases the arbitrator’s period and make it easy to implement. Load is evenly distributed to each switch with FCFS (First Come First Serve) rule, it can keep the order of cells in one stream. A multi-class queue scheduling policy is used in PSFBC to ensure the quality of realtime streams. Experiments show that the load on each switch in PSFBC is well balanced, its average delay of cells is little and its performance is very close to centrali{ed switch; and with the increase of number of parallel switches, the loss of PSFBC’s performance keeps very small, it becomes easier to implement.

On Some Key Technologies of ATM Switching

In this paper,the functions and the architecture of an ATM exchange are summarized.The switching fabrics,the line interface module and the control module are discussed in de-tail.An ATM switching system that adopts the scheme described in this paper has been de-veloped.

PERFORMANCE ANALYSIS OF ATM SWITCH FABRIC WITH COMBINED-INPUT/OUTPUT BUFFERING

This paper analyses the performance of the ATM switch fabric with Combined-Input/ Output Buffering(C-IOB) under two different service principles for the cells at the head of line (HOL) positions of input buffers: First Come First Service (FCFS)/Random Service(RS) for the set of HOL cells addressed to a given output port with different/same "age" (the waiting time at the HOL position) and Pure Random Service(PRS) for all HOL cells addressed to a given output port regardless of their "ages" while the Queue Loss (QL) transfer scheme is adopted for interaction between input and output buffers in the ATM switch fabric. The results obtained show that the C-IOB ATM switch fabric with PRS service policy and the QL transfer scheme is better than other buffering ATM switch fabrics.

Development of High-Speed On-Of Valves and Their Applications

With the widespread application of the computer and microelectronic technology in the industry,digitization becomes the inevitable developing trend of the hydraulic technology.Digitization of the hydraulic components is critical in the digital hydraulic technology.High-speed on-of valves(HSVs)which convert a train of input pulses into the fast and accurate switching between the on and of states belong to widely used basic digital hydraulic elements.In some ways,the characteristics of the HSVs determine the performance of the digital hydraulic systems.This paper discusses the development of HSVs and their applications.First,the HSVs with innovative structures which is classifed into direct drive valves and pilot operated valves are discussed,with the emphasis on their performance.Then,an overview of HSVs with intelligent materials is presented with considering of the switching frequency and fow capacity.Finally,the applications of the HSVs are reviewed,including digital hydraulic components with the integration of the HSVs and digital hydraulic systems controlled by the HSVs.

StarFabric技术综述

开关互连(Switched Fabric)技术将取代并行总线技术,成为新一代信号与信息处理机系统互连的解决方案。星型结构(StarFabric)是一种交换性能和可开发性较好的开关互连技术,用之可以较快地建立起以开关网络为中心架构的高性能信号与信息处理机系统平台。介绍了当前开关互连技术的发展现状;重点研究了StarFabric开关互连技术的互连协议、工作原理、技术特点和供开发的软硬件资源;对比分析了当前主流开关互连技术,并给出了星型结构技术的应用前景及其应用选择参考。

基于Fabric网络平台的中间件设计

基于Fabric网络拓扑及其传输特点,设计了模块级综合化信号与信息处理机的网络通信中间件模型,详细描述了其中的Fabric通信模型、网络管理模型和图形化配置监控模型。该中间件通过映射Fabric物理端口为多个逻辑通信端口,屏蔽网络链路的容错细节,以及静态逻辑连接关系和应用部署的动态绑定,实现了位置无关的网络通信、应用部署、容错控制、配置及监控维护等处理机平台基础设施,减小了系统应用与机器平台的设计耦合,增强了系统应用的设计灵活性,可以显著提高系统应用的集成效率。

基于CIOQ架构改进iSLIP调度算法的研究

为了提高数据在传输过程中的性能指标和用户服务质量,针对CIOQ架构和iSLIP调度算法进行研究,提出了一种优先匹配队列信元数量达到满载的PMQF_iSLIP调度算法。算法先判断VOQ队列中的信元数量是否等于设置的最大容量,再根据判断结果执行不同的算法步骤,最终更新已完成匹配端口的优先级,在下一次匹配时,使端口具有优先匹配的权力。最后通过自己开发的数据交换仿真平台,对改进的算法进行仿真和分析,仿真结果表明,在相同的流量模型下,改进的算法减少了丢包率,增加了吞吐率。

Interruption Characteristics of High-speed Switches in 500 kV Fault Current Limiter with High Coupled Split Reactance

A 500 kV high-voltage AC fault current limiter(FCL)based on a high coupled split reactor(HCSR)is pro-posed by the National key R&D project team.Low impedance under normal conditions and high impedance under short-circuit conditions are accomplished by the cooperation of HCSR and high-speed switches.High-speed switches play an important role in current limiting processes,thus interruption characteristics of the high-speed switch in the 500 kV FCL are studied in this paper.The simulation model of the FCL and the external equivalent power grid are established.The short-circuit current and recovery voltage characteristics of the high-speed switch in FCL are simulated.The results show that maximum DC component of the short-circuit current of the high-speed switch reaches 91%,the maximum peak value is 118 kA,and the longest arcing time is 14.8 ms.There is a discontinuity in the curve of the short-circuit current peak and arcing time as a function of the short-circuit occurrence time;the peak recovery voltage of a single break of the high-speed switch has a maximum value of 87.5 kV under a three-phase ungrounded short-circuit condition,and the rate of rise of recovery voltage is o.22 kV/s.The recovery voltage peak shows a period change with the short-circuit occurrence time,and the period is 10 ms.The effects of the shunt capacitor value and short-circuit ground resistance on the recovery voltage of high-speed switching are also studied.The research can be used for reference by R&D personnel and testersof500kVFCLs.Index Terms-Fault current limiter(FCL),high coupled split reactor(HCSR),high-speed switch,interruption characteristics,short circuit current.

一种基于StarFabric总线的通用信号处理平台设计

基于共享总线(CPCI或VME)的信号处理模块由于共享总线带宽逐渐成为提升信号处理系统性能的瓶颈,开关互连技术是新一代信号处理系统互连的趋势。给出了一种基于StarFabric总线的多DSP构成的通用信号处理平台设计,突破了这种设计瓶颈,能满足多种信号处理功能的需要。

Fast and Noniterative Scheduling in Input-Queued Switches

Most high-end switches use an input-queued or a combined input- and output-queued architecture. The switch fabrics of these architectures commonly use an iterative scheduling system such as iSLIP. Iterative schedulers are not very scalable and can be slow. We propose a new scheduling algorithm that finds a maximum matching of a modified I/O mapping graph in a single iteration (hence noniterative). Analytically and experimentally, we show that it provides full throughput and incurs very low delay;it is fair and of low complexity;and it outperforms traditional iterative schedulers. We also propose two switch architectures suited for this scheduling scheme and analyze their hardware implementations. The arbiter circuit is simple, implementing only a FIFO queue. Only half as many arbiters for an iterative scheme are needed. The arbiters operate in complete parallel. They work for both architectures and make the hardware implementations sim-ple. The first architecture uses conventional queuing structure and crossbar. The second one uses separate memories for each queue at an input port and a special crossbar. This crossbar is simple and also has a re-duced diameter and distributed structure. We also show that the architectures have good scalability and re-quire almost no speedup.

Constructing on-demand single/multi-color transitioning fabrics with photocatalysis/photothermal-armed deficient semiconductors

On-demand color switching systems that utilize synchronized semiconductor-catalyzed reduction and photothermal-accelerated oxidation in liquid/solid are highly appealing.Herein,on-demand single/multi-color switching fabrics have been constructed by using defective SnO_(2):Sb-based color switching systems.SnO_(2):Sb nanocrystals with the suitable doping concentration accord lattices with abundant free electrons,conferring high photocatalytic and photothermal performances.A well-crafted set of dual light-responsive semiconductor-catalyzed systems with rapid color change can be attained via the homogenous mixture of SnO_(2):Sb with suitable redox dyes to produce single-color(RGB(red,green,blue))and multi-color transitioning(purple and green)systems.The illumination of these systems by 450 nm light triggers rapid photocatalytic discoloration,while irradiation by 980 nm light confers the photothermal effect that accelerates recoloration in air.Besides,the inks can be extended to rewritable fabrics by embedding the nanocrystals and redox dyes into hydroxyethyl cellulose(as the polymer matrix)and then coating on hydrophobic cotton fabrics to produce photo-switchable fabrics with excellent single/multi-color response.By exploiting the dual light interactions with the semiconductor-mediated systems,various images/letters can be remotely printed and erased on the rewritable fabrics which show promise for potential applications as information storage media and visual sensors.Importantly,the present rewritable fabric shows good stability and reversibility.The present work provides insights into the development of novel color-switching materials.

一种公平服务的动态轮询调度算法

调度策略是核心路由交换设备性能的重要保证.针对联合输入交叉节点排队(combined input and cross-point queuing,简称CICQ)交换结构现有调度策略在复杂度或性能方面存在的缺陷,深入探讨了CICQ交换结构调度策略设计的基本准则,并提出了CICQ下虚拟通道的概念.基于基本准则和虚拟通道概念,提出一种简单、高效和公平服务的动态轮询调度策略——FDR(fair service and dynamic round robin).其算法复杂度为O(1),具有良好的可扩展性;并依据虚拟通道的状态为其分配调度份额,具有良好的动态实时性能,能够适应流量负载非均衡的网络环境.SPES(switching performance evaluation systcm)仿真结果表明,该算法具有良好的时延、吞吐量和抗突发性能.

新型的IBA刀片式集群服务器及其内部互联

从服务器分类以及应用的角度阐述了现有集群服务器的优劣势,指出以Infiniband为基础的刀片式集群服务器将更能适应服务的要求。最后,提出并分析了一种实现128个端口交换网的冗余互联结构。

接触式串联射频MEMS开关的工艺研究

本文采用MEMS工艺制作接触式串联射频开关 ,射频开关采用双端固定的悬臂梁结构 ,悬梁为PECVD制作的SiN薄膜 ,溅射Au制作共平面波导 ,聚酰亚胺作为牺牲层 ,运用等离子体刻蚀法释放牺牲层。研究了悬梁、共平面波导以及电极的制作工艺 ,并分析了牺牲层的制作和刻蚀工艺对开关结构的影响。

高速信元交换调度算法研究

输入缓存交换结构的特点是缓存器和交换结构的运行速率与端口速率相等、实现容易 ,但存在队头阻塞 (HOL) ,其吞吐率只有约 5 8% .采用虚拟输出排队方法 (VOQ)和适当的信元调度算法可消除HOL ,使吞吐率达到10 0 % .本文通过仿真对几种调度算法 :PIM、iSLIP和LPF进行了全面地研究、比较和评价 .