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Hot-carrier degradation for 90 nm gate length LDD- NMOSFET with ultra-thin gate oxide under low gate voltage stress
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作者 陈海峰 郝跃 +2 位作者 马晓华 李康 倪金玉 《Chinese Physics B》 SCIE EI CAS CSCD 2007年第3期821-825,共5页
The hot-carrier degradation for 90 nm gate length lightly-doped drain (LDD) NMOSFET with ultra-thin (1.4 nm) gate oxide under the low gate voltage (LGV) (at Vg = Vth, where Yth is the threshold voltage) stress... The hot-carrier degradation for 90 nm gate length lightly-doped drain (LDD) NMOSFET with ultra-thin (1.4 nm) gate oxide under the low gate voltage (LGV) (at Vg = Vth, where Yth is the threshold voltage) stress has been investigated. It is found that the drain current decreases and the threshold voltage increases after the LGV (Vg = Vth) stress. The results are opposite to the degradation phenomena of conventional NMOSFET for the case of this stress. By analysing the gate-induced drain leakage (GIDL) current before and after stresses, it is confirmed that under the LGV stress in ultra-short gate LDD-NMOSFET with ultra-thin gate oxide, the hot holes are trapped at interface in the LDD region and cannot shorten the channel to mask the influence of interface states as those in conventional NMOSFET do, which leads to the different degradation phenomena from those of the conventional NMOS devices. This paper also discusses the degradation in the 90 nm gate length LDD-NMOSFET with 1.4 nm gate oxide under the LGV stress at Yg = Yth with various drain biases. Experimental results show that the degradation slopes (n) range from 0.21 to 0.41. The value of n is less than that of conventional MOSFET (0.5 - 0.6) and also that of the long gate length LDD MOSFET (- 0.8). 展开更多
关键词 threshold voltage lightly doped drain gate-induced drain leakage current hot hole
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MOSFET栅电流分布的理论建模
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作者 汤玉生 郝跃 《电子学报》 EI CAS CSCD 北大核心 1999年第10期124-127,共4页
小尺寸MOSFET的强场性、场畸变性和漏区尺度比例的增大,使它的分布效应增强.更准确地描述小尺寸器件的栅电流需要分布模型.本文依据“幸运电子”概念,基于我们已创建的沟道和衬底电流的二维分布模型,建立了NMOSFET ... 小尺寸MOSFET的强场性、场畸变性和漏区尺度比例的增大,使它的分布效应增强.更准确地描述小尺寸器件的栅电流需要分布模型.本文依据“幸运电子”概念,基于我们已创建的沟道和衬底电流的二维分布模型,建立了NMOSFET 的电子和空穴栅电流的分布模型.空穴栅电流的分布模型是基于负纵向场加速的新的发射物理过程建立的.所建分布模型包含了更祥尽的热载流子向栅发射的物理过程,这将有利于MOSFET热载流子的损伤分布。 展开更多
关键词 电子栅电流 空穴栅电流 分布模型 MOSFET
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SHH应力下超薄栅氧PMOS器件退化研究
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作者 胡仕刚 吴笑峰 席在芳 《中南大学学报(自然科学版)》 EI CAS CSCD 北大核心 2011年第9期2741-2745,共5页
对超薄栅氧PMOS器件衬底热空穴(SHH)应力下SILC(应力感应泄漏电流)特性和机理进行研究。研究结果表明:在SHH应力下,栅电流在开始阶段减小,这是正电荷在氧化层中积累的结果;随后栅电流慢慢地增加,最后,当在氧化层中积累的正电荷密度达到... 对超薄栅氧PMOS器件衬底热空穴(SHH)应力下SILC(应力感应泄漏电流)特性和机理进行研究。研究结果表明:在SHH应力下,栅电流在开始阶段减小,这是正电荷在氧化层中积累的结果;随后栅电流慢慢地增加,最后,当在氧化层中积累的正电荷密度达到一个临界值时,栅上漏电流迅速跳变到较大数量级上,说明器件被击穿;当注入空穴通过Si—O网络时,随着注入空穴流的增加,化学键断裂的概率增加;当1个Si原子的2个Si—O键同时断裂时,将会导致Si—O网络不可恢复;Si—O键断裂导致氧化层网络结构发生改变和损伤积累,最终导致氧化层破坏性被击穿。 展开更多
关键词 衬底热空穴 阈值电压 栅氧化层 应力感应泄漏电流 MOS器件
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